By Terasic Inc. 440
The DE0-Nano-SoC development kit from Terasic presents a robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core ARM® Cortex™-A9 embedded cores with industry-leading, programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system. Altera’s SoC integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces tied seamlessly with the FPGA fabric using a high-bandwidth, interconnect backbone. The DE0-Nano-SoC development board is equipped with high-speed DDR3 memory, analog-to-digital capabilities, Ethernet networking, and much more that promise many exciting applications.
The DE0-Nano-SoC development kit contains all the tools needed to use the board in conjunction with a computer that runs Microsoft Windows XP or later.
FPGA Device | HPS (Hard Processor System) | |
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eewiki: Terasic's Altera Cyclone V SE 5CSEMA4U23C6N based DE0-Nano-SoC or Atlas-SoC kit