SN74LVTH646DWRG4

SN74LVTH646DWRG4
Mfr. #:
SN74LVTH646DWRG4
描述:
Bus Transceivers 3.3V ABT Octal Bus Transceivr Registr
生命周期:
制造商新产品。
数据表:
SN74LVTH646DWRG4 数据表
交货:
DHL FedEx Ups TNT EMS
支付:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
更多信息:
SN74LVTH646DWRG4 更多信息 SN74LVTH646DWRG4 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
总线收发器
RoHS:
Y
逻辑系列:
LVT
输入电平:
LVTTL
输出电平:
LVTTL
输出类型:
3-State
高电平输出电流:
- 32 mA
低电平输出电流:
64 mA
传播延迟时间:
5.6 ns
电源电压 - 最大值:
3.6 V
电源电压 - 最小值:
2.7 V
最低工作温度:
- 40 C
最高工作温度:
+ 85 C
包装/案例:
SOIC-24
打包:
卷轴
功能:
总线收发器/寄存器
高度:
2.35 mm
长度:
15.4 mm
电路数量:
1
产品:
双CMOS
技术:
双CMOS
宽度:
7.52 mm
品牌:
德州仪器
安装方式:
贴片/贴片
通道数:
8
电源电流 - 最大值:
5 mA
工作电源电压:
3.3 V
极性:
同相
产品类别:
总线收发器
出厂包装数量:
1
子类别:
逻辑 IC
触发类型:
上升沿
单位重量:
0.022025 oz
Tags
SN74LVTH646DW, SN74LVTH646D, SN74LVTH64, SN74LVTH6, SN74LVTH, SN74LVT, SN74LV, SN74L, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC BUS TRANSCEIVER 8BIT 24SOIC
***as Instruments
These bus transceivers and registers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. The ’LVTH646 devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’LVTH646. Output-enable (OE\) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The direction control (DIR) determines which bus receives data when OE\ is low. In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register. When an output function is disabled, the input function still is enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
型号 描述 库存 价格
SN74LVTH646DWRG4
DISTI # SN74LVTH646DWRG4-ND
IC TXRX NON-INVERT 3.6V 24SOIC
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74LVTH646DWRG4
    DISTI # 595-SN74LVTH646DWRG4
    Bus Transceivers 3.3V ABT Octal Bus Transceivr Registr
    RoHS: Compliant
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