SN74LVTH2952DWRE4

SN74LVTH2952DWRE4
Mfr. #:
SN74LVTH2952DWRE4
描述:
Bus Transceivers 20-BIT DUAL BUS TRANSCEIVER
生命周期:
制造商新产品。
数据表:
SN74LVTH2952DWRE4 数据表
交货:
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ECAD Model:
更多信息:
SN74LVTH2952DWRE4 更多信息 SN74LVTH2952DWRE4 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
总线收发器
RoHS:
Y
逻辑系列:
74LVTH
输入电平:
LVTTL
输出电平:
LVTTL
输出类型:
3-State
高电平输出电流:
- 32 mA
低电平输出电流:
64 mA
传播延迟时间:
5.3 ns
电源电压 - 最大值:
3.6 V
电源电压 - 最小值:
2.7 V
最低工作温度:
- 40 C
最高工作温度:
+ 85 C
包装/案例:
SOIC-24
打包:
卷轴
功能:
注册收发器
高度:
2.35 mm
长度:
15.4 mm
电路数量:
8
产品:
双CMOS
技术:
双CMOS
宽度:
7.52 mm
品牌:
德州仪器
安装方式:
贴片/贴片
通道数:
8
电源电流 - 最大值:
5 mA
工作电源电压:
2.7 V to 3.6 V
极性:
同相
产品类别:
总线收发器
出厂包装数量:
1
子类别:
逻辑 IC
触发类型:
上升沿
单位重量:
0.022025 oz
Tags
SN74LVTH2952DWR, SN74LVTH2952DW, SN74LVTH2952D, SN74LVTH29, SN74LVTH2, SN74LVTH, SN74LVT, SN74LV, SN74L, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC BUS TRANSCEIVER DUAL 24SOIC
***eco
OCTAL REG TRANSCEIVER WITH CLOCK ENABLE<AZ
***as Instruments
These octal bus transceivers and registers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. The ’LVTH2952 devices consist of two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input, provided that the clock-enable (CLKENAB\ or CLKENBA\) input is low. Taking the output-enable (OEAB\ or OEBA\) input low accesses the data on either port. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
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Mfr.#: SN74LVTH182652APM

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Mfr.#: SN74LVTH16835DGGR

OMO.#: OMO-SN74LVTH16835DGGR-TEXAS-INSTRUMENTS

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Mfr.#: SN74LVTH541DB

OMO.#: OMO-SN74LVTH541DB-1190

IC BUFF/DVR TRI-ST 8BIT 20SSOP
可用性
库存:
Available
订购:
2500
输入数量:
SN74LVTH2952DWRE4的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
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