SN74LVC841ADWRG4

SN74LVC841ADWRG4
Mfr. #:
SN74LVC841ADWRG4
描述:
Latches 10B Bus Interface DType Latch
生命周期:
制造商新产品。
数据表:
SN74LVC841ADWRG4 数据表
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ECAD Model:
更多信息:
SN74LVC841ADWRG4 更多信息 SN74LVC841ADWRG4 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
锁存器
RoHS:
Y
电路数量:
1 Circuit
逻辑类型:
D 型闩锁
逻辑系列:
LVC
极性:
同相
静态电流:
10 uA
输出线数:
10 Line
高电平输出电流:
- 24 mA
低电平输出电流:
32 mA
传播延迟时间:
7.5 ns at 2.7 V, 6.7 ns at 3.3 V
电源电压 - 最大值:
3.6 V
电源电压 - 最小值:
1.65 V
最低工作温度:
- 40 C
最高工作温度:
+ 85 C
包装/案例:
SOIC-24
打包:
卷轴
功能:
透明的
高度:
2.35 mm
长度:
15.4 mm
输出类型:
3-State
类型:
D型
宽度:
7.52 mm
品牌:
德州仪器
安装方式:
贴片/贴片
通道数:
10 Channel
输入行数:
10 Line
工作电源电压:
1.8 V, 2.5 V, 3.3 V
产品类别:
锁存器
重置类型:
无重置
出厂包装数量:
1
子类别:
逻辑 IC
单位重量:
0.021006 oz
Tags
SN74LVC841ADWR, SN74LVC841ADW, SN74LVC841AD, SN74LVC841A, SN74LVC84, SN74LVC8, SN74LVC, SN74LV, SN74L, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
*** Stop Electro
Bus Driver, LVC/LCX/Z Series, 1-Func, 10-Bit, True Output, CMOS, PDSO24
***i-Key
IC D-TYPE LATCH SGL 3-ST 24SOIC
***as Instruments
This 10-bit bus-interface D-type latch is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC841A is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The ten latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. A buffered output-enable (OE)\ input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE\ does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
图片 型号 描述
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OMO.#: OMO-SN74LVC827ADWG4-TEXAS-INSTRUMENTS

IC BUF NON-INVERT 3.6V 24SOIC
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Mfr.#: SN74LVC827ADBRG4

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Buffers & Line Drivers 10B Buffer Drive
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Mfr.#: SN74LVC86AQDREP

OMO.#: OMO-SN74LVC86AQDREP-TEXAS-INSTRUMENTS

Logic Gates Mil Enhance Quad 2- Input Exclusive-OR
SN74LVC823ADBRG4

Mfr.#: SN74LVC823ADBRG4

OMO.#: OMO-SN74LVC823ADBRG4-1190

Flip Flops 9B Bus Interface FlipFlop
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Mfr.#: SN74LVC86APWTG4

OMO.#: OMO-SN74LVC86APWTG4-1190

Logic Gates Quad 2 Input Exclusive OR Gate
可用性
库存:
Available
订购:
1500
输入数量:
SN74LVC841ADWRG4的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
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