DC1525A-C

Mfr. #:: DC1525A-C
制造商:: Analog Devices Inc.
描述:: Data Conversion IC Development Tools LTC2173-14 - 14-Bit, 80Msps, 1.8V Quad
生命周期:: 制造商新产品。
数据表:: DC1525A-C 数据表
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HTML Datasheet:: DC1525A-C Datasheet DC1525A-C Datasheet (P4-P6)DC1525A-C Datasheet (P7-P9)DC1525A-C Datasheet (P10)
ECAD Model:
更多信息:: DC1525A-C 更多信息 DC1525A-C Product Details

产品属性
属性值

制造商：: 模拟设备公司

产品分类：: 数据转换IC开发工具

RoHS：: Y

产品：: 演示板

类型：: 模数转换器

工具用于评估：: LTC2173-14

工作电源电压：: 3 V to 6 V

系列：: LTC2171

品牌：: 模拟设备公司

产品类别：: 数据转换IC开发工具

出厂包装数量：: 1

子类别：: 开发工具

Tags: DC1525A, DC1525, DC152, DC15, DC1

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

DC1525A-C 描述

***va Crawler: LTC2173-14 | 14-Bit, 80Msps, 1.8V Quad Serial ADC, 5MHz < Ain < 170MHz, req DC1371 and DC1075

***ark: 14Bit Analog To Digital-Adc Evaluation Board, Requires Dc890 & Lvds_Xfmr

***ical: LTC2173-14 ADC Demonstration Circuit 80MSPS Pscope IDE

***ment14 APAC: 14BIT ADC Eval Brd, Rq. DC890 & LVDS"XFM

***log Devices: The LTC2175-14/LTC2174-14/LTC2173-14 are 4-channel, simultaneous sampling 14-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 73.1dB SNR and 88dB spurious free dynamic range (SFDR). Ultralow jitter of 0.15psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS. The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode). At lower sampling rates there is a one bit per channel option (1-lane mode). The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2173-12 12 LTC2173-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multichannel Data Acquisition Nondestructive Testing

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