SN74GTLPH1655DGGR

SN74GTLPH1655DGGR
Mfr. #:
SN74GTLPH1655DGGR
描述:
Translation - Voltage Levels Triple 2-Ch Analog Mltplxr/Demltplxr
生命周期:
制造商新产品。
数据表:
SN74GTLPH1655DGGR 数据表
交货:
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ECAD Model:
更多信息:
SN74GTLPH1655DGGR 更多信息 SN74GTLPH1655DGGR Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
转换 - 电压电平
RoHS:
Y
传播延迟时间:
0.8 ns
电源电压 - 最大值:
3.45 V
电源电压 - 最小值:
3.15 V
最低工作温度:
- 40 C
最高工作温度:
+ 85 C
安装方式:
贴片/贴片
包装/案例:
TSSOP-64
打包:
卷轴
特征:
Partial power down (Ioff), Power up 3 state, Bias Vcc, Over-voltage tolerant inputs, Bus-Hold, TI-O
工作温度范围:
- 40 C to + 85 C
输出类型:
3-State
系列:
SN74GTLPH1655
品牌:
德州仪器
逻辑系列:
GTLP
逻辑类型:
CMOS
高电平输出电流:
- 24 mA
低电平输出电流:
100 mA
工作电源电流:
40 mA
产品类别:
转换 - 电压电平
出厂包装数量:
2000
子类别:
逻辑 IC
单位重量:
0.009263 oz
Tags
SN74GTLPH165, SN74GTLPH1, SN74GTLPH, SN74GTLP, SN74G, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
    G***a
    G***a
    IT

    OK!!!Thank You.

    2019-04-15
    E**n
    E**n
    LT

    Quality is normal. Long shipping.The quality is normal. Long delivery.

    2019-05-13
    A***M
    A***M
    RU

    Delivery is fast. I ordered two pieces, both norms.

    2019-04-18
***AS INSTRU
The SN74GTLPH1655 is a high-drive, 16-bit UBT™ transceiver that provides LVTTL-to-GTLP and GTLP-to-LVTTL signal-level translation. It is partitioned as two 8-bit transceivers and allows for transparent, latched, and clocked modes of data transfer. The device provides a high-speed interface between cards operating at LVTTL logic levels and a backplane operating at GTLP signal levels. High-speed (about three times faster than standard LVTTL or TTL) backplane operation is a direct result of GTLP's reduced output swing (<1 V), reduced input threshold levels, improved differential input, OEC™ circuitry, and TI-OPc™ circuitry. Improved GTLP OEC and TI-OPC circuits minimize bus-settling time and have been designed and tested using several backplane models. The high drive allows incident-wave switching in heavily loaded backplanes with equivalent load impedance down to 11 .
***as Instr.
GTLP is the Texas Instruments (TI™) derivative of the Gunning Transceiver Logic (GTL) JEDEC standard JESD 8-3. The ac specification of the SN74GTLPH1655 is given only at the preferred higher noise-margin GTLP, but the user has the flexibility of using this device at either GTL (VTT = 1.2 V and VREF = 0.8 V) or GTLP (VTT = 1.5 V and VREF = 1 V) signal levels.
***
Normally, the B port operates at GTLP signal levels. The A-port and control inputs operate at LVTTL logic levels, but are 5-V tolerant and are compatible with TTL and 5-V CMOS inputs. VREF is the B-port differential input reference voltage.
***as Instr.
This device is fully specified for live-insertion applications using Ioff, power-up 3-state, and BIAS VCC. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The BIAS VCC circuitry precharges and preconditions the B-port input/output connections, preventing disturbance of active data on the backplane during card insertion or removal, and permits true live-insertion capability.
***AS INSTR
This GTLP device features TI-OPC circuitry, which actively limits overshoot caused by improperly terminated backplanes, unevenly distributed cards, or empty slots during low-to-high signal transitions. This improves signal integrity, which allows adequate noise margin to be maintained at higher frequencies.
***AS INSTRU
High-drive GTLP backplane interface devices feature adjustable edge-rate control (ERC). Changing the ERC input voltage between GND and VCC adjusts the B-port output rise and fall times.This allows the designer to optimize system data-transfer rate and signal integrity to the backplane load.
***AS USD
Active bus-hold circuitry holds unused or undriven LVTTL data inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
***XS
When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, the output-enable (OE\) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Logic Solutions
OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More
型号 描述 库存 价格
SN74GTLPH1655DGGR
DISTI # V72:2272_07336375
Bus XCVR Single 16-CH 3-ST 64-Pin TSSOP T/R
RoHS: Compliant
509
  • 500:$6.5470
  • 250:$7.2570
  • 100:$7.6140
  • 25:$8.3120
  • 10:$9.1160
  • 1:$10.0170
SN74GTLPH1655DGGR
DISTI # 296-12340-1-ND
IC UNIV BUS TXRX 16BIT 64TSSOP
RoHS: Compliant
Min Qty: 1
Container: Cut Tape (CT)
10133In Stock
  • 1000:$6.1182
  • 500:$7.0246
  • 100:$8.0670
  • 10:$9.7440
  • 1:$10.7900
SN74GTLPH1655DGGR
DISTI # 296-12340-6-ND
IC UNIV BUS TXRX 16BIT 64TSSOP
RoHS: Compliant
Min Qty: 1
Container: Digi-Reel®
10133In Stock
  • 1000:$6.1182
  • 500:$7.0246
  • 100:$8.0670
  • 10:$9.7440
  • 1:$10.7900
SN74GTLPH1655DGGR
DISTI # 296-12340-2-ND
IC UNIV BUS TXRX 16BIT 64TSSOP
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)
Temporarily Out of Stock
  • 2000:$5.7200
SN74GTLPH1655DGGR
DISTI # 29456940
Bus XCVR Single 16-CH 3-ST 64-Pin TSSOP T/R
RoHS: Compliant
10000
  • 4000:$5.5000
  • 2000:$5.6610
SN74GTLPH1655DGGR
DISTI # 26600173
Bus XCVR Single 16-CH 3-ST 64-Pin TSSOP T/R
RoHS: Compliant
509
  • 500:$6.5470
  • 250:$7.2570
  • 100:$7.6140
  • 25:$8.3120
  • 10:$9.1160
  • 2:$10.0170
SN74GTLPH1655DGGR
DISTI # SN74GTLPH1655DGGR
Bus XCVR Single 16-CH 3-ST 64-Pin TSSOP T/R - Tape and Reel (Alt: SN74GTLPH1655DGGR)
RoHS: Compliant
Min Qty: 2000
Container: Reel
Americas - 0
  • 2000:$6.2900
  • 4000:$5.9900
  • 8000:$5.7900
  • 12000:$5.5900
  • 20000:$5.4900
SN74GTLPH1655DGGR
DISTI # SN74GTLPH1655DGGR
Bus XCVR Single 16-CH 3-ST 64-Pin TSSOP T/R (Alt: SN74GTLPH1655DGGR)
RoHS: Compliant
Min Qty: 2000
Container: Tape and Reel
Europe - 0
  • 2000:€5.2900
  • 4000:€5.2900
  • 8000:€5.2900
  • 12000:€5.2900
  • 20000:€5.1900
SN74GTLPH1655DGGR16-Bit LVTTL-To-GTLP Adjustable-Edge-Rate Universal Bus Transceiver6000
  • 1000:$5.0000
  • 750:$5.1000
  • 500:$5.9000
  • 250:$6.7800
  • 100:$7.2600
  • 25:$8.1000
  • 10:$8.6700
  • 1:$9.6400
SN74GTLPH1655DGGRRegistered Bus Transceiver, GTLP Series, 2-Func, 8-Bit, True Output, CMOS, PDSO64
RoHS: Compliant
27369
  • 1000:$5.7900
  • 500:$6.0900
  • 100:$6.3500
  • 25:$6.6200
  • 1:$7.1300
SN74GTLPH1655DGGR
DISTI # 595-SN74GTLPH1655DGG
Translation - Voltage Levels Triple 2-Ch Analog Mltplxr/Demltplxr
RoHS: Compliant
562
  • 1:$10.4700
  • 10:$9.4700
  • 25:$8.7600
  • 100:$7.8400
  • 250:$7.4400
  • 500:$6.8300
  • 1000:$5.9400
  • 2000:$5.7200
SN74GTLPH1655DGGR
DISTI # C1S746202662539
Bus XCVR Single 16-CH 3-ST 64-Pin TSSOP T/R
RoHS: Compliant
509
  • 250:$7.2570
  • 100:$7.6140
  • 25:$8.3120
  • 10:$9.1160
  • 1:$10.0170
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可用性
库存:
522
订购:
2505
输入数量:
SN74GTLPH1655DGGR的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
参考价格(美元)
数量
单价
小计金额
1
US$10.47
US$10.47
10
US$9.47
US$94.70
25
US$8.76
US$219.00
100
US$7.84
US$784.00
250
US$7.44
US$1 860.00
500
US$6.83
US$3 415.00
1000
US$5.94
US$5 940.00
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