SN74ALS29854DWE4

SN74ALS29854DWE4
Mfr. #:
SN74ALS29854DWE4
描述:
IC TRANSCVR INVERT 5.25V 24SOIC
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SN74ALS29854DWE4 数据表
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SN74ALS29854DWE4 更多信息 SN74ALS29854DWE4 Product Details
产品属性
属性值
Tags
SN74ALS29854D, SN74ALS2985, SN74ALS298, SN74ALS29, SN74ALS2, SN74ALS, SN74AL, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC TRANSCVR 8-9BIT INVERT 24SOIC
***ark
Transceiver Logic IC; No. of Pins:24; Operating Temperature Range:0°C to +70°C; Leaded Process Compatible:Yes; Logic Family:ALS; Package/Case:24-SOIC; Peak Reflow Compatible (260 C):Yes ;RoHS Compliant: Yes
***as Instruments
The SN74ALS29854 is an 8-bit to 9-bit parity transceiver designed for two-way communication between data buses. When data is transmitted from the A bus to the B bus, a parity bit is generated. When data is transmitted from the B bus to the A bus with its corresponding parity bit, the parity-error () output indicates whether or not an error in the B data has occurred. The output-enable (, ) inputs can be used to disable the device so that the buses are effectively isolated. A 9-bit parity generator/checker generates a parity-odd (PARITY) output and monitors the parity of the I/O ports with an open-collector flag. can be either passed, sampled, stored, or cleared from the latch using the latch-enable () and clear () control inputs. When both OEA\ and OEB\ are low, data is transferred from the A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives the designer more system diagnostic capability. The SN74ALS29854 is characterized for operation from 0°C to 70°C.
型号 描述 库存 价格
SN74ALS29854DWE4
DISTI # SN74ALS29854DWE4-ND
IC TRANSCVR INVERT 5.25V 24SOIC
RoHS: Compliant
Min Qty: 50
Container: Tube
Limited Supply - Call
    SN74ALS29854DWE4
    DISTI # 595-SN74ALS29854DWE4
    Bus Transceivers 8 to 9-Bit Parity Bus Transceivers
    RoHS: Compliant
    0
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      订购:
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