OMAPL138EZCED4

OMAPL138EZCED4
Mfr. #:
OMAPL138EZCED4
描述:
Digital Signal Processors & Controllers - DSP, DSC C6000 DSP+ARM Processor
生命周期:
制造商新产品。
数据表:
OMAPL138EZCED4 数据表
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ECAD Model:
更多信息:
OMAPL138EZCED4 更多信息 OMAPL138EZCED4 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
数字信号处理器和控制器 - DSP、DSC
RoHS:
Y
安装方式:
贴片/贴片
包装/案例:
PBGA-361
系列:
OMAP-L138
产品:
DSP
核:
TMS320C674x, ARM926EJ-S
最大时钟频率:
456 MHz, 456 MHz
L1 高速缓存指令存储器:
32 kB, 16 kB
L1 高速缓存数据存储器:
32 kB, 16 kB
数据内存大小:
8 kB
工作电源电压:
1.3 V
最低工作温度:
- 40 C
最高工作温度:
+ 105 C
打包:
托盘
高度:
0.94 mm
长度:
13 mm
宽度:
13 mm
品牌:
德州仪器
数据ROM大小:
64 kB
接口类型:
I2C, Parallel, SPI, USB
数据总线宽度:
16 bit, 32 bit
输入/输出电压:
1.8 V, 3.3 V
教学类型:
定点/浮点
L2 缓存指令/数据存储器:
256 kB
MFLOPS:
2746 MFLOPS
湿气敏感:
是的
核心数:
2 Core
定时器/计数器的数量:
3 Timer
处理器系列:
OMAP
产品类别:
DSP - 数字信号处理器和控制器
出厂包装数量:
160
子类别:
嵌入式处理器和控制器
电源电压 - 最大值:
1.35 V
电源电压 - 最小值:
1.25 V
商品名:
OMAP
看门狗定时器:
看门狗定时器
单位重量:
0.027845 oz
Tags
OMAPL138EZC, OMAPL138E, OMAPL138, OMAPL1, OMAPL, OMAP, OMA
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***as Instruments
C674x DSP+Arm Processor - 456MHz 361-NFBGA -40 to 90
***et Europe
DSP Fixed-Point/Floating-Point 32-Bit 456MHz 3648MIPS 361-Pin NFBGA
***i-Key
IC MPU OMAP-L1X 456MHZ 361NFBGA
***ical
SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA
***p One Stop Global
OMAP-L138 C6000 DSP+ARM PROCESSOR
***ark
Omapl138ezced4 Freon 2.3
***XS
The OMAP-L138 C6000 DSP+ARM processor is a low-power applications processor based on an ARM926EJ-S and a C674x DSP core. This processor provides significantly lower power than other members of the TMS320C6000™ platform of DSPs.
***XS
The device enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices with robust operating systems, rich user interfaces, and high processor performance through the maximum flexibility of a fully integrated, mixed processor solution.
***AS INSRUMENT
The dual-core architecture of the device provides benefits of both DSP and reduced instruction set computer (RISC) technologies, incorporating a high-performance TMS320C674x DSP core and an ARM926EJ-S core.
***AS INSTR
The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-, 16-, or 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously.
***NS
The ARM9 core has a coprocessor 15 (CP15), protection module, and data and program memory management units (MMUs) with table look-aside buffers. The ARM9 core has separate 16-KB instruction and 16-KB data caches. Both caches are 4-way associative with virtual index virtual tag (VIVT). The ARM9 core also has 8KB of RAM (Vector Table) and 64KB of ROM.
***AS INSTRUMENTS INCORPORATED
The device DSP core uses a 2-level cache-based architecture. The level 1 program cache (L1P) is a 32-KB direct mapped cache, and the level 1 data cache (L1D) is a 32-KB 2-way, set-associative cache. The level 2 program cache (L2P) consists of a 256-KB memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two. Although the DSP L2 is accessible by the ARM9 and other hosts in the system, an additional 128KB of RAM shared memory is available for use by other hosts without affecting DSP performance.
***as Instruments Inc.
For security-enabled devices, TI’s Basic Secure Boot lets users protect proprietary intellectual property and prevents external entities from modifying user-developed algorithms. By starting from a hardware-based “root-of-trust,” the secure boot flow ensures a known good starting point for code execution. By default, the JTAG port is locked down to prevent emulation and debug attacks; however, the JTAG port can be enabled during the secure boot process during application development. The boot modules are encrypted while sitting in external nonvolatile memory, such as flash or EEPROM, and are decrypted and authenticated when loaded during secure boot. Encryption and decryption protects the users’ IP and lets them securely set up the system and begin device operation with known, trusted code.
***
Basic Secure Boot uses either SHA-1 or SHA-256, and AES-128 for boot image validation. Basic Secure Boot also uses AES-128 for boot image encryption. The secure boot flow employs a multilayer encryption scheme which not only protects the boot process but also offers the ability to securely upgrade boot and application software code. A 128-bit device-specific cipher key, known only to the device and generated using a NIST-800-22 certified random number generator, is used to protect user encryption keys. When an update is needed, the customer uses the encryption keys to create a new encrypted image. Then the device can acquire the image through an external interface, such as Ethernet, and overwrite the existing code. For more details on the supported security features or TI’s Basic Secure Boot, see the .
***AS
The peripheral set includes: a 10/100 Mbps Ethernet media access controller (EMAC) with a management data input/output (MDIO) module; one USB2.0 OTG interface; one USB1.1 OHCI interface; two I2C Bus interfaces; one multichannel audio serial port (McASP) with 16 serializers and FIFO buffers; two multichannel buffered serial ports (McBSPs) with FIFO buffers; two serial peripheral interfaces (SPIs) with multiple chip selects; a configurable 16-bit host-port interface (HPI); up to 9 banks of general-purpose input/output (GPIO) pins, with each bank containing 16 pins with programmable interrupt and event generation modes, multiplexed with other peripherals; three UART interfaces (each with RTS and CTS); two enhanced high-resolution pulse width modulator (eHRPWM) peripherals; three 32-bit enhanced capture (eCAP) module peripherals which can be configured as 3 capture inputs or 3 APWM outputs; two external memory interfaces: an asynchronous and SDRAM external memory interface (EMIFA) for slower memories or peripherals; and a higher speed DDR2/Mobile DDR controller.
***TEXAS
The EMAC provides an efficient interface between the device and a network. The EMAC supports both 10Base-T and 100Base-TX, or 10 Mbps and 100 Mbps in either half- or full-duplex mode. Additionally, an MDIO interface is available for PHY configuration. The EMAC supports both MII and RMII interfaces.
***ASI
The Serial ATA (SATA) controller provides a high-speed interface to mass data storage devices. The SATA controller supports both SATA I (1.5 Gbps) and SATA II (3.0 Gbps).
***XS
The Universal Parallel Port (uPP) provides a high-speed interface to many types of data converters, FPGAs, or other parallel devices. The uPP supports programmable data widths between 8- to 16-bits on both channels. Single-data rate and double-data rate transfers are supported as well as START, ENABLE, and WAIT signals to provide control for a variety of data converters.
***ASIN
A video port interface (VPIF) provides a flexible video I/O port.
***AS INSTRUMENTS INC
The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each peripheral, see the related sections in this document and the associated peripheral reference guides.
***as Instruments Inc.
The device has a complete set of development tools for the ARM9 and DSP. These tools include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows debugger interface for visibility into source code execution.
Processors
OMO Electronic Processors provide a comprehensive portfolio, proven software, and worldwide support enabling industry-leading automotive and industrial solutions. TI is dedicated to advancing and optimizing today’s processors to meet tomorrow’s intelligence, performance and cost requirements in automotive and industrial applications. Scalable hardware and software platforms with common code allow designers to seamlessly reuse and migrate across devices to protect future investment.
型号 描述 库存 价格
OMAPL138EZCED4
DISTI # 296-38548-ND
IC MPU OMAP-L1X 456MHZ 361NFBGA
RoHS: Compliant
Min Qty: 1
Container: Tray
7403In Stock
  • 160:$26.9967
  • 25:$30.1936
  • 10:$31.6150
  • 1:$34.2800
OMAPL138EZCED4E
DISTI # 296-42789-ND
IC MPU OMAP-L1X 456MHZ 361NFBGA
RoHS: Compliant
Min Qty: 1
Container: Tray
113In Stock
  • 160:$27.9954
  • 25:$31.3108
  • 10:$32.7840
  • 1:$35.5500
OMAPL138EZCED4
DISTI # OMAPL138EZCED4
DSP Fixed-Point/Floating-Point 32-Bit 456MHz 3648MIPS 361-Pin NFBGA (Alt: OMAPL138EZCED4)
RoHS: Compliant
Min Qty: 1
Europe - 60
  • 1:€28.5900
  • 10:€26.9900
  • 25:€25.8900
  • 50:€25.7900
  • 100:€22.3900
  • 500:€21.2900
  • 1000:€21.2900
OMAPL138EZCED4
DISTI # OMAPL138EZCED4
DSP Fixed-Point/Floating-Point 32-Bit 456MHz 3648MIPS 361-Pin NFBGA - Trays (Alt: OMAPL138EZCED4)
RoHS: Compliant
Min Qty: 1
Container: Tray
Americas - 4480
  • 1:$31.1900
  • 10:$30.3900
  • 25:$29.5900
  • 50:$28.8900
  • 100:$27.6900
  • 500:$27.0900
  • 1000:$26.5900
OMAPL138EZCED4
DISTI # OMAPL138EZCED4
DSP Fixed-Point/Floating-Point 32-Bit 456MHz 3648MIPS 361-Pin NFBGA (Alt: OMAPL138EZCED4)
RoHS: Compliant
Min Qty: 160
Asia - 0
    OMAPL138EZCED4E
    DISTI # OMAPL138EZCED4E
    DSP Fixed-Point/Floating-Point 32-Bit 456MHz 3648MIPS 361-Pin NFBGA (Alt: OMAPL138EZCED4E)
    RoHS: Compliant
    Min Qty: 1
    Europe - 0
    • 1:€29.0900
    • 10:€27.6900
    • 25:€26.2900
    • 50:€25.0900
    • 100:€23.9900
    • 500:€22.9900
    • 1000:€22.0900
    OMAPL138EZCED4E
    DISTI # OMAPL138EZCED4E
    DSP Fixed-Point/Floating-Point 32-Bit 456MHz 3648MIPS 361-Pin NFBGA - Trays (Alt: OMAPL138EZCED4E)
    RoHS: Compliant
    Min Qty: 160
    Container: Tray
    Americas - 0
    • 160:$30.6900
    • 320:$29.8900
    • 640:$28.7900
    • 960:$28.0900
    • 1600:$27.5900
    OMAPL138EZCED4C6000 DSP+ARM Processor2397
    • 1000:$20.1800
    • 750:$20.2500
    • 500:$22.5600
    • 250:$23.9800
    • 100:$24.1600
    • 25:$27.1700
    • 10:$28.0600
    • 1:$30.0200
    OMAPL138EZCED4EC6000 DSP+ARM Processor2389
    • 1000:$20.9300
    • 750:$21.0000
    • 500:$23.3900
    • 250:$24.8600
    • 100:$25.0500
    • 25:$28.1800
    • 10:$29.1000
    • 1:$31.1300
    OMAPL138EZCED4
    DISTI # 595-OMAPL138EZCED4
    Digital Signal Processors & Controllers - DSP, DSC C6000 DSP+ARM Processor
    RoHS: Compliant
    390
    • 1:$34.2800
    • 5:$32.8700
    • 10:$31.6200
    • 25:$30.2000
    • 100:$27.0000
    • 250:$25.7600
    OMAPL138EZCED4E
    DISTI # 595-OMAPL138EZCED4E
    Digital Signal Processors & Controllers - DSP, DSC C6000 DSP+ARM Processor
    RoHS: Compliant
    112
    • 1:$35.5500
    • 5:$34.0800
    • 10:$32.7900
    • 25:$31.3200
    • 100:$28.0000
    • 250:$26.7100
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    可用性
    库存:
    245
    订购:
    2228
    输入数量:
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    参考价格(美元)
    数量
    单价
    小计金额
    1
    US$34.28
    US$34.28
    5
    US$32.87
    US$164.35
    10
    US$31.62
    US$316.20
    25
    US$30.20
    US$755.00
    100
    US$27.00
    US$2 700.00
    250
    US$25.76
    US$6 440.00
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