CLVCH16T245MDGVREP

CLVCH16T245MDGVREP
Mfr. #:
CLVCH16T245MDGVREP
描述:
Translation - Voltage Levels EP 16B LEVEL TRANSL
生命周期:
制造商新产品。
数据表:
CLVCH16T245MDGVREP 数据表
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ECAD Model:
更多信息:
CLVCH16T245MDGVREP 更多信息 CLVCH16T245MDGVREP Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
转换 - 电压电平
RoHS:
Y
传播延迟时间:
8.2 ns
电源电压 - 最大值:
5.5 V
电源电压 - 最小值:
1.65 V
最低工作温度:
- 55 C
最高工作温度:
+ 125 C
安装方式:
贴片/贴片
包装/案例:
TVSOP-48
打包:
卷轴
数据速率:
500 Mb/s
特征:
部分断电 (Ioff)、过压耐受输入、输出使能、总线保持、Vcc 隔离
工作温度范围:
- 55 C to + 125 C
输出类型:
3-State
系列:
SN74LVCH16T245-EP
品牌:
德州仪器
逻辑系列:
LVC
逻辑类型:
CMOS
高电平输出电流:
32 mA
低电平输出电流:
32 mA
产品类别:
转换 - 电压电平
出厂包装数量:
2000
子类别:
逻辑 IC
第 # 部分别名:
V62/09605-01YE
单位重量:
0.004356 oz
Tags
CLVCH16T, CLVCH, CLVC, CLV
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***AS INSTUMENTS
This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
***AS INSTRUMEN
The SN74LVCH16T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA.
***AS INTRUMENTS
The SN74LVCH16T245 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level applied to prevent excess ICC and ICCZ.
***AS INSTRUMENTS INCORPORATED
Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
***AS INSRUMENT
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
***ASIN
The VCC isolation feature ensures that if either VCC input is at GND, then all outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.
***ASI
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Logic Solutions
OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More
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可用性
库存:
Available
订购:
1984
输入数量:
CLVCH16T245MDGVREP的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
参考价格(美元)
数量
单价
小计金额
1
US$3.50
US$3.50
10
US$3.14
US$31.40
100
US$2.57
US$257.00
250
US$2.41
US$602.50
500
US$2.19
US$1 095.00
1000
US$1.84
US$1 840.00
由于2021年半导体供不应求,低于2021年之前的正常价格,请发询价确认。
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