CVMEH22501AIDGGREP

CVMEH22501AIDGGREP
Mfr. #:
CVMEH22501AIDGGREP
描述:
Universal Bus Functions Mil Enhance 8B Univ Bus Xcvr
生命周期:
制造商新产品。
数据表:
CVMEH22501AIDGGREP 数据表
交货:
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ECAD Model:
更多信息:
CVMEH22501AIDGGREP 更多信息 CVMEH22501AIDGGREP Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
通用总线功能
RoHS:
Y
逻辑类型:
CMOS
逻辑系列:
虚拟机
电路数量:
1
传播延迟时间:
10.5 ns
电源电压 - 最大值:
3.45 V
电源电压 - 最小值:
3.15 V
最低工作温度:
- 55 C
最高工作温度:
+ 125 C
包装/案例:
TSSOP-48
打包:
卷轴
功能:
通用总线收发器
高度:
1.15 mm
长度:
12.5 mm
输出类型:
3-State
系列:
SN74VMEH22501A-EP
宽度:
6.1 mm
品牌:
德州仪器
安装方式:
贴片/贴片
高电平输出电流:
- 48 mA
低电平输出电流:
64 mA
工作电源电压:
3.3 V
极性:
同相
产品类别:
通用总线功能
出厂包装数量:
2000
子类别:
逻辑 IC
第 # 部分别名:
V62/05606-01XE
单位重量:
0.007873 oz
Tags
CVMEH22501AI, CVME, CVM
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***AS INTRUMENTS
The SN74VMEH22501A-EP 8-bit universal bus transceiver has two integral 1-bit three-wire bus transceivers and is designed for 3.3-V VCC operation with 5-V tolerant inputs. The UBT transceiver allows transparent, latched, and flip-flop modes of data transfer, and the separate LVTTL input and outputs on the bus transceivers provide a feedback path for control and diagnostics monitoring. This device provides a high-speed interface between cards operating at LVTTL logic levels and VME64, VME64x, or VME320(2) backplane topologies.
***as Instr.
The SN74VMEH22501A-EP device is pin-for-pin compatible to the SN74VMEH22501 device (SCES357), but operates at a wider operating temperature range.
***AS INSTRUMENT
High-speed backplane operation is a direct result of the improved OEC circuitry and high drive that has been designed and tested into the VME64x backplane model. The B-port I/Os are optimized for driving large capacitive loads and include pseudo-ETL input thresholds (½ VCC ±50 mV) for increased noise immunity. These specifications support the 2eVME protocols in VME64x (ANSI/VITA 1.1) and 2eSST protocols in VITA 1.5.
***XS
With proper design of a 21-slot VME system, a designer can achieve 320-MB transfer rates on linear backplanes and, possibly, 1-GB transfer rates on the VME320 backplane.
***AS INST
All inputs and outputs are 5-V tolerant and are compatible with TTL and 5-V CMOS inputs.
***
Active bus-hold circuitry holds unused or undriven 3A-port inputs at a valid logic state. Bus-hold circuitry is not provided on 1A or 2A inputs, any B-port input, or any control input. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
***NS
This device is fully specified for live-insertion applications using Ioff, power-up 3-state, and BIAS VCC. The Ioff circuitry prevents damaging current to backflow through the device when it is powered off/on. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. The BIAS VCC circuitry precharges and preconditions the B-port input/output connections, preventing disturbance of active data on the backplane during card insertion or removal, and permits true live-insertion capability.
***AS INS
When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, output-enable (OE and OEBY) inputs should be tied to VCC through a pullup resistor and output-enable (OEAB) inputs should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the drive capability of the device connected to this input.
Logic Solutions
OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More
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可用性
库存:
Available
订购:
4500
输入数量:
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