TMS320DM643AZNZ6

TMS320DM643AZNZ6
Mfr. #:
TMS320DM643AZNZ6
描述:
Digital Signal Processors & Controllers - DSP, DSC Fixed-Point Dig Sig Proc
生命周期:
制造商新产品。
数据表:
TMS320DM643AZNZ6 数据表
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更多信息:
TMS320DM643AZNZ6 更多信息 TMS320DM643AZNZ6 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
数字信号处理器和控制器 - DSP、DSC
RoHS:
Y
安装方式:
贴片/贴片
包装/案例:
FCBGA-548
系列:
TMS320DM643
产品:
DSP
核:
TMS320C64x
最大时钟频率:
600 MHz
L1 高速缓存指令存储器:
16 kB
L1 高速缓存数据存储器:
16 kB
工作电源电压:
1.4 V
最低工作温度:
0 C
最高工作温度:
+ 90 C
打包:
托盘
品牌:
德州仪器
接口类型:
Audio, Ethernet, I2C, UART, USB, Video
I/O 数量:
16 I/O
数据总线宽度:
32 bit
输入/输出电压:
3.3 V
教学类型:
固定点
L2 缓存指令/数据存储器:
256 kB
湿气敏感:
是的
核心数:
1 Core
定时器/计数器的数量:
3 x 32 bit
处理器系列:
达芬奇
产品类别:
DSP - 数字信号处理器和控制器
出厂包装数量:
40
子类别:
嵌入式处理器和控制器
商品名:
DaVinci TMS320
看门狗定时器:
看门狗定时器
单位重量:
0.126951 oz
Tags
TMS320DM643AZN, TMS320DM643AZ, TMS320DM643A, TMS320DM643, TMS320DM6, TMS320DM, TMS320D, TMS320, TMS32, TMS3, TMS
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
    M***i
    M***i
    TR

    thanks

    2019-05-12
    E**z
    E**z
    RU

    Thank You

    2019-06-01
    K***o
    K***o
    JP

    Thank you very much.

    2019-02-24
***as Instruments
Video/Imaging Fixed-Point Digital Signal Processor 548-FCBGA
***ical
DSP Fixed-Point 32-Bit 600MHz 4800MIPS 548-Pin FCBGA
***ser
DSP- DaVinci Digital Media Fixed-Point Dig Sig Proc
***AS INSRUMENT
The TMS320C64x™ DSPs (including the TMS320DM643 device) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The TMS320DM643 (DM643) device is based on the second-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture (VelociTI.2™) developed by Texas Instruments (TI), making these DSPs an excellent choice for digital media applications. The C64x™ is a code-compatible member of the C6000™ DSP platform.
***INS
With performance of up to 4800 million instructions per second (MIPS) at a clock rate of 600 MHz, the DM643 device offers cost-effective solutions to high-performance DSP programming challenges. The DM643 DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x™ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units-two multipliers for a 32-bit result and six arithmetic logic units (ALUs)-with VelociTI.2™ extensions. The VelociTI.2™ extensions in the eight functional units include new instructions to accelerate the performance in video and imaging applications and extend the parallelism of the VelociTI™ architecture. The DM643 can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2400 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4800 MMACS. The DM643 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000™ DSP platform devices.
***AS INSTRU
The DM643 uses a two-level cache-based architecture and has a powerful and diverse set of peripherals. The Level 1 program cache (L1P) is a 128-Kbit direct mapped cache and the Level 1 data cache (L1D) is a 128-Kbit 2-way set-associative cache. The Level 2 memory/cache (L2) consists of an 2-Mbit memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two. The peripheral set includes: two configurable video ports; a 10/100 Mb/s Ethernet MAC (EMAC); a management data input/output (MDIO) module; a VCXO interpolated control port (VIC); one multichannel buffered audio serial port (McASP0); an inter-integrated circuit (I2C) Bus module; one multichannel buffered serial port (McBSP); three 32-bit general-purpose timers; a user-configurable 16-bit or 32-bit host-port interface (HPI16/HPI32); a 16-pin general-purpose input/output port (GP0) with programmable interrupt/event generation modes; and a 64-bit glueless external memory interface (EMIFA), which is capable of interfacing to synchronous and asynchronous memories and peripherals.
***AS INSTRUMENTS INC
The DM643 device has two configurable video port peripherals (VP1 and VP2). These video port peripherals provide a glueless interface to common video decoder and encoder devices. The DM643 video port peripherals support multiple resolutions and video standards (e.g., CCIR601, ITU-BT.656, BT.1120, SMPTE 125M, 260M, 274M, and 296M).
***AS
These two video port peripherals are configurable and can support either video capture and/or video display modes. Each video port consists of two channels - A and B with a 5120-byte capture/display buffer that is splittable between the two channels.
***AS
For more details on the Video Port peripherals, see the TMS320C64x DSP Video Port/VCXO Interpolated Control (VIC) Port Reference Guide (literature number SPRU629).
***AS INSTRUMEN
The McASP0 port supports one transmit and one receive clock zone, with eight serial data pins which can be individually allocated to any of the two zones. The serial port supports time-division multiplexing on each pin from 2 to 32 time slots. The DM643 has sufficient bandwidth to support all 8 serial data pins transmitting a 192-kHz stereo signal. Serial data in each zone may be transmitted and received on multiple serial data pins simultaneously and formatted in a multitude of variations on the Philips Inter-IC Sound (I2S) format.
***TEXAS
In addition, the McASP0 transmitter may be programmed to output multiple S/PDIF, IEC60958, AES-3, CP-430 encoded data channels simultaneously, with a single RAM containing the full implementation of user data and channel status fields.
***
McASP0 also provides extensive error-checking and recovery features, such as the bad clock detection circuit for each high-frequency master clock which verifies that the master clock is within a programmed frequency range.
***AS INSTRUMENT
The VCXO interpolated control (VIC) port provides digital-to-analog conversion with resolution from 9-bits to up to 16-bits. The output of the VIC is a single bit interpolated D/A output.For more details on the VIC port, see the TMS320C64x DSP Video Port/VCXO Interpolated Control (VIC) Port Reference Guide (literature number SPRU629).
***AS USD
The ethernet media access controller (EMAC) provides an efficient interface between the DM643 DSP core processor and the network. The DM643 EMAC support both 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) and 100 Mbps in either half- or full-duplex, with hardware flow control and quality of service (QOS) support. The DM643 EMAC makes use of a custom interface to the DSP core that allows efficient data transmission and reception.For more details on the EMAC, see the TMS320C6000 DSP Ethernet Media Access Controller (EMAC) / Management Data Input/Output (MDIO) Module Reference Guide (literature number SPRU628).
***AS
The management data input/output (MDIO) module continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system. Once a PHY candidate has been selected by the DSP, the MDIO module transparently monitors its link state by reading the PHY status register. Link change events are stored in the MDIO module and can optionally interrupt the DSP, allowing the DSP to poll the link status of the device without continuously performing costly MDIO accesses. For more details on the MDIO, see the TMS320C6000 DSP Ethernet Media Access Controller (EMAC) / Management Data Input/Output (MDIO) Module Reference Guide (literature number SPRU628).
***ASIN
The I2C0 port on the TMS320DM643 allows the DSP to easily control peripheral devices and communicate with a host processor. In addition, the standard multichannel buffered serial port (McBSP) may be used to communicate with serial peripheral interface (SPI) mode peripheral devices.
***AS INSTRUMENTS INCORPORATED
The DM643 has a complete set of development tools which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows® debugger interface for visibility into source code execution.
型号 描述 库存 价格
TMS320DM643AZNZ6
DISTI # 296-42875-ND
IC FIXED-POINT DSP 548-FCBGA
RoHS: Compliant
Min Qty: 1
Container: Tray
40In Stock
  • 120:$49.6299
  • 40:$53.5575
  • 10:$55.3430
  • 1:$58.9100
TMS320DM643AZNZ6
DISTI # TMS320DM643AZNZ6
DSP Fixed-Point 32-Bit 600MHz 4800MIPS 548-Pin FCBGA - Trays (Alt: TMS320DM643AZNZ6)
RoHS: Compliant
Min Qty: 40
Container: Tray
Americas - 0
  • 40:$59.5900
  • 80:$58.0900
  • 160:$55.7900
  • 240:$54.4900
  • 400:$53.4900
TMS320DM643AZNZ6
DISTI # TMS320DM643AZNZ6
DSP Fixed-Point 32-Bit 600MHz 4800MIPS 548-Pin FCBGA (Alt: TMS320DM643AZNZ6)
RoHS: Compliant
Min Qty: 1
Europe - 0
  • 1:€51.1900
  • 10:€49.6900
  • 25:€48.1900
  • 50:€46.8900
  • 100:€45.5900
  • 500:€44.2900
  • 1000:€43.1900
TMS320DM643AZNZ6Video/Imaging Fixed-Point Digital Signal Processor1440
  • 1000:$40.5700
  • 750:$40.7000
  • 500:$45.3500
  • 250:$48.2000
  • 100:$48.5600
  • 25:$54.6300
  • 10:$56.4100
  • 1:$60.3400
TMS320DM643AZNZ6
DISTI # 595-TMS320DM643AZNZ6
Digital Signal Processors & Controllers - DSP, DSC Fixed-Point Dig Sig Proc
RoHS: Compliant
40
  • 1:$58.9200
  • 5:$57.1300
  • 10:$55.3500
  • 25:$53.5600
  • 100:$49.6300
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EMULATOR TRACE SYSTEM USB
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Mfr.#: TMDSEMU560V2STM-UE

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EMULATOR TRACE SYSTEM XDS560
可用性
库存:
40
订购:
2023
输入数量:
TMS320DM643AZNZ6的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
参考价格(美元)
数量
单价
小计金额
1
US$58.92
US$58.92
5
US$57.13
US$285.65
10
US$55.35
US$553.50
25
US$53.56
US$1 339.00
100
US$49.63
US$4 963.00
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