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TLK10081CTR

TLK10081CTR
Mfr. #:
TLK10081CTR
描述:
Serializers & Deserializers - Serdes 10Gbps 1-8 CH Multi- Rate Link Aggregator
生命周期:
制造商新产品。
数据表:
TLK10081CTR 数据表
交货:
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ECAD Model:
更多信息:
TLK10081CTR 更多信息 TLK10081CTR Product Details
产品属性
属性值
制造商：
德州仪器
产品分类：
序列化器和反序列化器 - Serdes
RoHS：
Y
数据速率：
0.25 Gb/s
最低工作温度：
- 40 C
最高工作温度：
+ 85 C
包装/案例：
FCBGA-144
打包：
托盘
系列：
TLK10081
品牌：
德州仪器
开发套件：
TLK10081EVM
湿气敏感：
是的
产品类别：
序列化器和反序列化器 - Serdes
出厂包装数量：
119
子类别：
接口 IC
Tags
TLK100, TLK10, TLK1, TLK
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***as Instruments
10Gbps 1-8 Channel Multi-Rate Redundant Link Aggregator 144-FCBGA -40 to 85
***ical
Serial Link Aggregator 2TX 2RX 1.25Gbps 144-Pin FCBGA Tray
***ark
10G 1-8 Ch Multi-Rate Redundant Link Agg
***XS
The TLK10081 is a multi-rate link aggregator intended for use in high-speed bi-directional point-to-point data transmission systems. The device allows for a reduction in the number of physical links required for a certain data throughput by multiplexing multiple lower-rate serial links into higher-rate serial links.
***as Instruments Inc.
The TLK10081 has a low-speed interface which can accommodate one to eight bidirectional serial links running at rates from 250 Mbps to 1.25 Gbps (maximum of 10 Gbps total throughput). The device’s high speed interfaces can operate at rates from 1 Gbps to 10 Gbps. The high speed interface is designed to run at 8 x the low speed serial rate regardless of the number of lanes connected. Filler data will be placed on any unused lanes in order to keep the interleaved lane ordering constant. This allows for low speed lanes to be hot swapped during normal operation without requiring a change in configuration.
***
A 1:1 mode is also supported for data rates ranging from 0.5 Gbps to 2.5 Gbps, whereby both low speed and high speed are rate matched. The TX and RX datapaths are also independent, so TX may operate in 8:1 mode while RX operates in 1:1 mode. This independence is restricted to using the same low speed line rate. For example, the TX can operate at 8 × 1.25 Gbps while RX operates at 1 × 1.25 Gbps.
***as Instruments Inc.
The individual Low Speed lanes may also operate at independent rates in byte interleave mode, provided they are operating at integer multiples. The High Speed line rate must be configured based on the fastest Low Speed line rate.
***TEXAS
The device has multiple interleaving/de-interleaving schemes that may be used depending on the data type. These schemes allow for the low speed lane ordering to be recovered after the lanes are transmitted over a single high-speed link. There is also a programmable scrambling/de-scrambling function available to help ensure that the high-speed data has suitable properties for transmission (i.e., sufficient transition density for clock recovery and DC balance over time) even for non-ideal input data.
***XS
The TLK10081 has the ability to perform lane alignment on 2, 3, or 4 lanes with up to four bytes of lane de-skew.
***OMO Electronic
Both the low speed and high speed side interfaces (transmitters and receivers) use CML signaling with integrated termination resistors and feature programmable transmitter de-emphasis levels and adaptive receive equalization to help compensate for media impairments at higher frequencies. The device’s serial transceivers used are capable of interfacing to optical modules as well as higher-loss connections such as PCB backplanes and controlled-impedance copper cabling.
***AS INSTUMENTS
To aid in system synchronization, the TLK10081 is capable of extracting clocking information from the serial input data streams and outputting a recovered clock signal. This recovered clock can be input to a jitter cleaner in order to provide a synchronized system clock. The device also has two reference clock input ports and a flexible internal PLL, allowing for various serial rates to be supported with a single reference clock input frequency.
***INS
The device has various built-in self-test features to aid with system validation and debugging. Among these are pattern generation and verification on all serial lanes as well as internal data loopback paths.
型号 描述 库存 价格
TLK10081CTR
DISTI # V99:2348_07387264		Serial Link Aggregator 2TX 2RX 1.25Gbps 144-Pin FCBGA Tray
RoHS: Compliant		119
  • 119:$31.4100
  • 25:$34.4900
  • 10:$36.1100
  • 1:$38.6800
TLK10081CTR
DISTI # 296-39816-5-ND		IC XAUI TO XFI TXRX 144-BGA
RoHS: Compliant
Min Qty: 1
Container: Tube		1002In Stock
  • 119:$33.4950
  • 25:$36.9600
  • 10:$38.5770
  • 1:$41.3500
TLK10081CTR
DISTI # 25864826		Serial Link Aggregator 2TX 2RX 1.25Gbps 144-Pin FCBGA Tray
RoHS: Compliant		119
  • 100:$41.5700
  • 25:$43.2200
  • 10:$44.8900
  • 1:$46.6000
TLK10081CTR
DISTI # TLK10081CTR		Serial Link Aggregator 144-Pin FC-BGA Tray - Trays (Alt: TLK10081CTR)
RoHS: Compliant
Min Qty: 119
Container: Tray		Americas - 0
  • 119:$38.4900
  • 238:$37.5900
  • 476:$36.0900
  • 714:$35.1900
  • 1190:$34.5900
TLK10081CTR
DISTI # TLK10081CTR		Serial Link Aggregator 144-Pin FC-BGA Tray (Alt: TLK10081CTR)
RoHS: Compliant
Min Qty: 1
Container: Tray		Europe - 0
  • 1:€36.6900
  • 10:€34.7900
  • 25:€33.0900
  • 50:€31.5900
  • 100:€30.1900
  • 500:€28.8900
  • 1000:€27.7900
TLK10081CTR10Gbps 1-8 Channel Multi-Rate Redundant Link Aggregator3570
  • 1000:$26.2500
  • 750:$26.3300
  • 500:$29.3400
  • 250:$31.1900
  • 100:$31.4200
  • 25:$35.3400
  • 10:$36.5000
  • 1:$39.0400
TLK10081CTR
DISTI # 595-TLK10081CTR		Serializers & Deserializers - Serdes 10Gbps 1-8 CH Multi- Rate Link Aggregator
RoHS: Compliant		0
  • 119:$33.5000
TLK10081CTRTelecom Circuit, 1-Func, PBGA144
RoHS: Compliant		1252
  • 1000:$30.4000
  • 500:$31.9900
  • 100:$33.3100
  • 25:$34.7400
  • 1:$37.4100
TLK10081CTR
DISTI # C1S746203311890		Serial Link Aggregator 2TX 2RX 1.25Gbps 144-Pin FCBGA Tray
RoHS: Compliant		119
  • 100:$41.2400
  • 25:$42.7700
  • 10:$44.4099
  • 1:$46.0000
图片 型号 描述
CDCLVP1204RGTT

Mfr.#: CDCLVP1204RGTT

OMO.#: OMO-CDCLVP1204RGTT

 Clock Buffer Lo Jttr 2-In Sel 1:4 Uni-to-LVPECL Bfr
TXB0108PWR

Mfr.#: TXB0108PWR

OMO.#: OMO-TXB0108PWR

 Translation - Voltage Levels 8-Bit Bi-directional V-Level Translator
TPS74401RGWT

Mfr.#: TPS74401RGWT

OMO.#: OMO-TPS74401RGWT

 LDO Voltage Regulators 3A LDO w/ Prog Soft-Start
TLV70233DBVR

Mfr.#: TLV70233DBVR

OMO.#: OMO-TLV70233DBVR

 LDO Voltage Regulators 300mALow IQLDO Reg
TXB0108PWR

Mfr.#: TXB0108PWR

OMO.#: OMO-TXB0108PWR-TEXAS-INSTRUMENTS

 Translation - Voltage Levels 8-Bit Bi-directional V-Level Translato
TLV70233DBVR

Mfr.#: TLV70233DBVR

OMO.#: OMO-TLV70233DBVR-TEXAS-INSTRUMENTS

 LDO Voltage Regulators 300mALow IQLDO Reg
TPS74401RGWT

Mfr.#: TPS74401RGWT

OMO.#: OMO-TPS74401RGWT-TEXAS-INSTRUMENTS

 LDO Voltage Regulators 3A LDO w/ Prog Soft-Start
CDCLVP1204RGTT

Mfr.#: CDCLVP1204RGTT

OMO.#: OMO-CDCLVP1204RGTT-TEXAS-INSTRUMENTS

 Clock Buffer Lo Jttr 2-In Sel 1:4 Uni-to-LVPECL Bf
可用性
库存:
Available
订购:
3000
输入数量:
TLK10081CTR的当前价格仅供参考，如果您想获得最优惠的价格，请提交查询或直接发送电子邮件至我们的销售团队[email protected]
参考价格（美元）
数量
单价
小计金额
119
US$33.50
US$3 986.50
357
US$32.34
US$11 545.38
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