SN74LVC1G79QDCKRQ1

SN74LVC1G79QDCKRQ1
Mfr. #:
SN74LVC1G79QDCKRQ1
描述:
Flip Flops Automotive Single Positive-Edge-Triggered D-Type Flip-Flop 5-SC70 -40 to 125
生命周期:
制造商新产品。
数据表:
SN74LVC1G79QDCKRQ1 数据表
交货:
DHL FedEx Ups TNT EMS
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ECAD Model:
更多信息:
SN74LVC1G79QDCKRQ1 更多信息 SN74LVC1G79QDCKRQ1 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
人字拖
RoHS:
Y
电路数量:
1
逻辑系列:
LVC
逻辑类型:
真的
输入类型:
传播延迟时间:
6 ns
高电平输出电流:
- 32 mA
低电平输出电流:
32 mA
电源电压 - 最小值:
1.65 V
电源电压 - 最大值:
5.5 V
最低工作温度:
- 40 C
最高工作温度:
+ 125 C
安装方式:
贴片/贴片
包装/案例:
SC70-5
打包:
卷轴
工作温度范围:
- 40 C to + 125 C
系列:
SN74LVC1G79-Q1
品牌:
德州仪器
输入行数:
1 Input
输出线数:
1 Output
最大时钟频率:
160 MHz
湿气敏感:
是的
产品类别:
人字拖
出厂包装数量:
3000
子类别:
逻辑 IC
单位重量:
0.000236 oz
Tags
SN74LVC1G79, SN74LVC1G7, SN74LVC1G, SN74LVC1, SN74LVC, SN74LV, SN74L, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***as Instruments
Automotive Single Positive-Edge-Triggered D-Type Flip-Flop 5-SC70 -40 to 125
*** Stop Electro
D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, 1-Bit, True Output, CMOS, PDSO5
***
Tape & Reel (TR) 74LVC1G79 e3 Automotive AEC-Q100 74LVC flip flop 2mm 5ns @ 5V 50pF 160MHz 1.65V~5.5V
***AS INSTRU
This automotive AEC-Q100 qualified single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.
***AS INSRUMENT
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.
***AS INSRUMENTS
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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可用性
库存:
Available
订购:
1987
输入数量:
SN74LVC1G79QDCKRQ1的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
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