SN74ALS569ADWG4

Mfr. #:: SN74ALS569ADWG4
描述:: Counter ICs Synch 4B Up Down Binary Counters
生命周期:: 制造商新产品。
数据表:: SN74ALS569ADWG4 数据表
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更多信息:: SN74ALS569ADWG4 更多信息 SN74ALS569ADWG4 Product Details

产品属性
属性值

制造商：: 德州仪器

产品分类：: 计数器 IC

RoHS：: Y

安装方式：: 贴片/贴片

包装/案例：: SOIC-20

计数器类型：: 二进制

逻辑系列：: TTL

位数：: 4

计数方法：: 异步

计数顺序：: 上/下

工作电源电压：: 4.5 V to 5.5 V

打包：: 管子

品牌：: 德州仪器

产品类别：: 计数器 IC

出厂包装数量：: 1

子类别：: 计数器 IC

单位重量：: 0.028254 oz

Tags: SN74ALS569AD, SN74ALS569A, SN74ALS569, SN74ALS56, SN74ALS5, SN74ALS, SN74AL, SN74A, SN74, SN7

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We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

SN74ALS569ADWG4 描述

***i-Key: IC COUNTER BINARY 4BIT 20SOIC

***ser: Logic - Counters Synch 4B Up Down Binary Counters

***ark: Counter Logic IC; Logic Family:ALS; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:20-SOIC; No. of Pins:20; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes; Output Type:TTL ;RoHS Compliant: Yes

***as Instruments: The SN74ALS568A decade counter and ´ALS569A binary counters are programmable, count up or down, and offer both synchronous and asynchronous clearing. All synchronous functions are executed on the positive-going edge of the clock (CLK) input. The clear function is initiated by applying a low level to either asynchronous clear (ACLR\) or synchronous clear (SCLR\). Asynchronous (direct) clearing overrides all other functions of the device, while synchronous clearing overrides only the other synchronous functions. Data is loaded from the A, B, C, and D inputs by holding load () low during a positive-going clock transition. The counting function is enabled only when enable P (ENP\) and enable T (ENT\) are low and ACLR\, SCLR\, and are high. The up/down (U/D\) input controls the direction of the count. These counters count up when U/D\ is high and count down when U/D\ is low. A high level at the output-enable () input forces the Q outputs into the high-impedance state, and a low level enables those outputs. Counting is independent of . ENT\ is fed forward to enable the ripple-carry output (RCO\) to produce a low-level pulse while the count is zero (all Q outputs low) when counting down or maximum (9 or 15) when counting up. The clocked carry output (CCO\) produces a low-level pulse for a duration equal to that of the low level of the clock when is low and the counter is enabled (both ENP\ and ENT\ are low); otherwise, CCO\ is high. CCO\ does not have the glitches commonly associated with a ripple-carry output. Cascading is normally accomplished by connecting or CCO\ of the first counter to ENT\ of the next counter. However, for very high-speed counting, should be used for cascading since CCO\ does not become active until the clock returns to the low level. The SN54ALS569A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS568A and SN74ALS569A are characterized for operation from 0°C to 70°C.

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