SN74LS173ADRG4

SN74LS173ADRG4
Mfr. #:
SN74LS173ADRG4
描述:
Flip Flops 4B D Type Registers
生命周期:
制造商新产品。
数据表:
SN74LS173ADRG4 数据表
交货:
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ECAD Model:
更多信息:
SN74LS173ADRG4 更多信息 SN74LS173ADRG4 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
人字拖
RoHS:
Y
电路数量:
1
逻辑系列:
LS
逻辑类型:
D 型触发器
极性:
同相
输入类型:
单端
输出类型:
单端
传播延迟时间:
30 ns
高电平输出电流:
- 2.6 mA
低电平输出电流:
24 mA
电源电压 - 最小值:
4.75 V
电源电压 - 最大值:
5.25 V
最低工作温度:
0 C
最高工作温度:
+ 70 C
安装方式:
贴片/贴片
包装/案例:
SOP-16
打包:
卷轴
功能:
D型总线接口
高度:
1.58 mm
长度:
9.9 mm
宽度:
3.91 mm
品牌:
德州仪器
通道数:
4
输入行数:
4
输出线数:
4
工作电源电压:
5 V
产品类别:
人字拖
重置类型:
主复位
出厂包装数量:
1
子类别:
逻辑 IC
单位重量:
0.023492 oz
Tags
SN74LS173ADR, SN74LS173AD, SN74LS173, SN74LS17, SN74LS1, SN74LS, SN74L, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE POS TRG SNGL 16SOIC
***ark
Flip-Flop Logic IC; Logic Family:LS; Supply Voltage Min:4.75V; Supply Voltage Max:5.25V; Package/Case:16-SOIC; No. of Pins:16; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
***as Instruments
The '173 and 'LS173A 4-bit registers include D-type flip-flops featuring totem-pole 3-state outputs capable of driving highly capacitive or relatively low-impedance loads. The high-impedance third state and increased high-logic-level drive provide these flip-flops with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. Up to 128 of the SN74173 or SN74LS173A outputs can be connected to a common bus and still drive two Series 54/74 or 54LS/74LS TTL normalized loads, respectively. Similarly, up to 49 of the SN54173 or SN54LS173A outputs can be connected to a common bus and drive one additional Series 54/74 or 54LS/74LS TTL normalized load, respectively. To minimize the possibility that two outputs will attempt to take a common bus to opposite logic levels, the output control circuitry is designed so that the average output disable times are shorter than the average output enable times. Gated enable inputs are provided on these devices for controlling the entry of data into the flip-flops. When both data-enable (G\1, G\2) inputs are low, data at the D inputs are loaded into their respective flip-flops on the next positive transition of the buffered clock input. Gate output-control (M, N) inputs also are provided. When both are low, the normal logic states (high or low levels) of the four outputs are available for driving the loads or bus lines. The outputs are disabled independently from the level of the clock by a high logic level at either output-control input. The outputs then present a high impedance and neither load nor drive the bus line. Detailed operation is given in the function table. The SN54173 and SN54LS173A are characterized for operation over the full military temperature range of -55C to 125C. The SN74173 and SN74LS173A are characterized for operation from 0C to 70C.
型号 描述 库存 价格
SN74LS173ADRG4
DISTI # SN74LS173ADRG4-ND
IC FF D-TYPE SNGL 4BIT 16SOIC
RoHS: Compliant
Min Qty: 2500
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74LS173ADRG4
    DISTI # 595-SN74LS173ADRG4
    Flip Flops 4B D Type Registers
    RoHS: Compliant
    0
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      可用性
      库存:
      Available
      订购:
      5500
      输入数量:
      SN74LS173ADRG4的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
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