SN65LVDS93BDGGR

SN65LVDS93BDGGR
Mfr. #:
SN65LVDS93BDGGR
描述:
Serializers & Deserializers - Serdes FLATLINK TRANSMITTER AND RECEIVER
生命周期:
制造商新产品。
数据表:
SN65LVDS93BDGGR 数据表
交货:
DHL FedEx Ups TNT EMS
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ECAD Model:
更多信息:
SN65LVDS93BDGGR 更多信息 SN65LVDS93BDGGR Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
序列化器和反序列化器 - Serdes
类型:
序列化器
数据速率:
2.38 Gb/s
输入类型:
LVTTL
输出类型:
LVDS
输入数量:
28 Input
输出数量:
4 Output
工作电源电压:
3.3 V
最低工作温度:
- 40 C
最高工作温度:
+ 85 C
安装方式:
贴片/贴片
包装/案例:
TSSOP-56
打包:
卷轴
产品:
Serdes 发射器
系列:
SN65LVDS93B
品牌:
德州仪器
工作电源电流:
75.1 mA
产品类别:
序列化器和反序列化器 - Serdes
出厂包装数量:
2000
子类别:
接口 IC
电源电压 - 最大值:
3.6 V
电源电压 - 最小值:
3 V
Tags
SN65LVDS93, SN65LVDS9, SN65LVDS, SN65LVD, SN65LV, SN65L, SN65, SN6
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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we buy and manage excess electronic components, including excess inventory identified for disposal.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***AS INSRUMENT
The SN65LVDS93B LVDS SerDes (serializer/deserializer) transmitter contains four 7-bit parallel load serial-out shift registers, a 7 × clock synthesizer, and five low-voltage differential signaling (LVDS) drivers in a single integrated circuit. These functions allow synchronous transmission of 28 bits of single-ended LVTTL data over five balanced-pair conductors for receipt by a compatible receiver, such as the DS90CR286A and SN65LVDS94.
***AS INSTR
When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock signal (CLKIN). The rising or falling edge of the clock can be selected through the clock select (CLKSEL) pin. The frequency of CLKIN is multiplied seven times and then used to serially unload the data registers in 7-bit slices. The four serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.
***AS INSTRUMENTS INCORPORATED
The SN65LVDS93B device requires no external components and little or no control. The data bus appears the same at the input to the transmitter and output of the receiver with the data transmission transparent to the users. The only user intervention is selecting a clock rising edge by inputting a high level to CLKSEL or a falling edge with a low-level input and the possible use of the shutdown/clear (SHTDN) signal. SHTDN is an active-low input to inhibit the clock and shut off the LVDS output drivers for lower power consumption. A low level on this signal clears all internal registers at a low level.
***XS
The SN65LVDS93B is characterized for operation over ambient air temperatures of –40°C to 85°C.
SN65LVDS93B/SN65LVDS93B-Q1 LVDS SerDes Transmitter
OMO Electronic SN65LVDS93B / SN65LVDS93B-Q1 LVDS SerDes (Serializer/Deserializer) Transmitter contains four 7-bit parallel load serial-out shift registers. The device also has a 7 × clock synthesizer and five low-voltage differential signaling (LVDS) drivers. This is all included in a single integrated circuit. These functions allow synchronous transmission of 28 bits of single-ended LVTTL data over five balanced-pair conductors for receipt by a compatible receiver, such as the DS90CR286A and SN65LVDS94. The SN65LVDS93B-Q1 devices are AEC-Q100 qualified for automotive applications.
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Serializers & Deserializers - Serdes Program 27B Display Ser Interface Trans
可用性
库存:
Available
订购:
5500
输入数量:
SN65LVDS93BDGGR的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
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