CDCLVD2106RHAR

CDCLVD2106RHAR
Mfr. #:
CDCLVD2106RHAR
描述:
Clock Buffer Low Jitter,Dual 1:6 Uni-to-LVDS Bfr
生命周期:
制造商新产品。
数据表:
CDCLVD2106RHAR 数据表
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更多信息:
CDCLVD2106RHAR 更多信息 CDCLVD2106RHAR Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
时钟缓冲器
RoHS:
Y
系列:
CDCLVD2106
输出数量:
12 Output
最大输入频率:
800 MHz
最低工作温度:
- 40 C
最高工作温度:
+ 85 C
安装方式:
贴片/贴片
包装/案例:
VQFN-40
打包:
卷轴
输入类型:
LVCMOS、LVDS、LVPECL
输出类型:
LVDS
品牌:
德州仪器
最大输出频率:
800 MHz
开发套件:
CDCLVD2106EVM
湿气敏感:
是的
产品类别:
时钟缓冲器
出厂包装数量:
2500
子类别:
时钟和定时器 IC
单位重量:
0.003668 oz
Tags
CDCLVD2106, CDCLVD2, CDCLVD, CDCLV, CDCL, CDC
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***roFlash
Clock Fanout Buffer 24-OUT 2-IN Dual 1: 6 40-Pin VQFN EP T/R
*** Stop Electro
Low Skew Clock Driver, CDC Series, 6 True Output(s), 0 Inverted Output(s), PQCC40
***as Instruments
Low jitter, dual 1:6 universal-to-LVDS buffer 40-VQFN -40 to 85
***AS INS
The CDCLVD2106 clock buffer distributes two clock inputs (IN0, IN1) to a total of 12 pairs of differential LVDS clock outputs (OUT0, OUT11). Each buffer block consists of one input and 6 LVDS outputs. The inputs can either be LVDS, LVPECL, or LVCMOS.
***as Instruments (TI)
The CDCLVD2106 is specifically designed for driving 50-Ω transmission lines. In case of driving the inputs in single ended mode, the appropriate bias voltage (VAC_REF) should be applied to the unused negative input pin.
***AS INSRUMENT
Using the control pin (EN), outputs can be either disabled or enabled. If the EN pin is left open two buffers with all outputs are enabled, if switched to a logical "0" both buffers with all outputs are disabled (static logical "0"), if switched to a logical "1", one buffer with six outputs is disabled and another buffer with six outputs is enabled. The part supports a fail safe function. It incorporates an input hysteresis, which prevents random oscillation of the outputs in absence of an input signal.
***AS INSTUMENTS
The device operates in 2.5V supply environment and is characterized from –40°C to 85°C (ambient temperature). The CDCLVD2106 is packaged in small 40-pin, 6-mm × 6-mm QFN package.
型号 描述 库存 价格
CDCLVD2106RHAR
DISTI # CDCLVD2106RHAR-ND
IC CLK BUFFER 1:6 800MHZ 40VQFN
RoHS: Compliant
Min Qty: 2500
Container: Tape & Reel (TR)
Temporarily Out of Stock
  • 2500:$5.7200
CDCLVD2106RHAR
DISTI # CDCLVD2106RHAR
Clock Fanout Buffer 24-OUT 40-Pin VQFN EP T/R - Tape and Reel (Alt: CDCLVD2106RHAR)
RoHS: Compliant
Min Qty: 2500
Container: Reel
Americas - 0
  • 2500:$6.2900
  • 5000:$5.9900
  • 10000:$5.7900
  • 15000:$5.5900
  • 25000:$5.4900
CDCLVD2106RHAT
DISTI # 595-CDCLVD2106RHAT
Clock Buffer Low Jitter,Dual 1:6 Uni-to-LVDS Bfr
RoHS: Compliant
64
  • 1:$10.6300
  • 10:$9.7700
  • 25:$9.2600
  • 100:$8.2500
  • 250:$7.8500
  • 500:$7.3400
  • 1000:$6.7300
CDCLVD2106RHAR
DISTI # 595-CDCLVD2106RHAR
Clock Buffer Low Jitter,Dual 1:6 Uni-to-LVDS Bfr
RoHS: Compliant
0
  • 1:$10.4700
  • 10:$9.4600
  • 25:$8.7600
  • 100:$7.8400
  • 250:$7.4400
  • 500:$6.8300
  • 1000:$5.9400
  • 2500:$5.7200
图片 型号 描述
CDCLVD1212EVM

Mfr.#: CDCLVD1212EVM

OMO.#: OMO-CDCLVD1212EVM

Clock & Timer Development Tools CDCLVD1212EVM
CDCLVD1212EVM

Mfr.#: CDCLVD1212EVM

OMO.#: OMO-CDCLVD1212EVM-TEXAS-INSTRUMENTS

CDCLVD1212 Evaluation Module
可用性
库存:
Available
订购:
4000
输入数量:
CDCLVD2106RHAR的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
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