DC854D-I

Mfr. #:: DC854D-I
制造商:: Analog Devices Inc.
描述:: Data Conversion IC Development Tools LTC2215IUP - CMOS OUT, 65Msps, 16-Bit A
生命周期:: 制造商新产品。
数据表:: DC854D-I 数据表
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更多信息:: DC854D-I 更多信息 DC854D-I Product Details

产品属性
属性值

制造商：: 模拟设备公司

产品分类：: 数据转换IC开发工具

RoHS：: Y

产品：: 演示板

类型：: 模数转换器

工具用于评估：: LTC2215

工作电源电压：: 3.15 V to 3.45 V

系列：: LTC2215

品牌：: 模拟设备公司

产品类别：: 数据转换IC开发工具

出厂包装数量：: 1

子类别：: 开发工具

Tags: DC854D, DC854, DC85, DC8

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

DC854D-I 描述

***ical: LTC2215 ADC Demonstration Circuit 65MSPS Pscope IDE

***hardson RFPD: LINEAR ICS - EVALUATION BOARD

***ark: Demo Board, 16-Bit Adc

***ment14 APAC: DEMO BOARD, 16-BIT ADC

***i-Key: EVAL BOARD FOR LTC2215

***log Devices: The LTC2216/LTC2215 are 80Msps/65Msps sampling 16- bit A/D converters designed for digitizing high frequency, wide dynamic range signals with input frequencies up to 400MHz. The input range of the ADC is ﬁxed at 2.75VP-P. The LTC2216/LTC2215 are perfect for demanding communications applications, with AC performance that includes 81.5dBFS noise ﬂoor and 100dB spurious free dynamic range (SFDR). Ultra low jitter of 85fsRMS allows undersampling of high input frequencies while maintaining excellent noise performance. Maximum DC specs include ±3.5LSB INL, ±1LSB DNL (no missing codes). The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed buses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed with a wide range of clock duty cycles. Applications Telecommunications Receivers Cellular Base Stations Spectrum Analysis Imaging Systems ATE

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