DC1564A-E

Mfr. #:: DC1564A-E
制造商:: Analog Devices Inc.
描述:: Data Conversion IC Development Tools LTC2156-12: 12-bit, 210Msps, 1.8V Dual A
生命周期:: 制造商新产品。
数据表:: DC1564A-E 数据表
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HTML Datasheet:: DC1564A-E Datasheet DC1564A-E Datasheet (P4-P6)DC1564A-E Datasheet (P7-P9)DC1564A-E Datasheet (P10)
ECAD Model:
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产品属性
属性值

制造商：: 模拟设备公司

产品分类：: 数据转换IC开发工具

RoHS：: Y

产品：: 演示板

类型：: 模数转换器

工具用于评估：: LTC2156-12

工作电源电压：: 3 V to 6 V

系列：: LTC2156

品牌：: 模拟设备公司

产品类别：: 数据转换IC开发工具

出厂包装数量：: 1

子类别：: 开发工具

Tags: DC1564, DC156, DC15, DC1

Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1:
Vacuum Packaging with PL

Step2:
Anti-Static Bag

Step3:
Packaging Boxes

DC1564A-E 描述

***va Crawler: LTC2156-12: 12-bit, 210Msps, 1.8V Dual ADC, DDR LVDS Outputs, 5-140MHz, req DC1371

***ark: 12Bit Analog To Digital-Adc Evaluation Board, Requires Dc890 & Dc1075; Silicon Manufacturer:linear Technology; Silicon Core Number:ltc2156-12; No. Of Bits:12Bit; Sample Rate:210Msps; Kit Application Type:data Converter Rohs Compliant: Na

***log Devices: The LTC2157-12/LTC2156-12/LTC2155-12 are a family of dual 250Msps/210Msps/170Msps 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 68.5dB SNR and 90dB spurious free dynamic range (SFDR). The 1.25GHz input bandwidth allows the ADC to achieve high undersampling ratio with very low attenuation. The latency is only five clock cycles. DC specs include ±0.26LSB INL (typ), ±0.16LSB DNL (typ) and no missing codes over temperature. The transition noise is 0.54LSBRMS. The digital outputs are double data rate (DDR) LVDS. The ENC+ and ENC– inputs can be driven differentially with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2156-12 12 LTC2156-14 14 Applications Communications Cellular Basestations Software Defined Radios Medical Imaging High Definition Video Testing and Measurement Instruments

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