SN74AS823ADWRE4

SN74AS823ADWRE4
Mfr. #:
SN74AS823ADWRE4
描述:
Flip Flops 9-Bit Bus-Interface F-F W/3-State Otpt
生命周期:
制造商新产品。
数据表:
SN74AS823ADWRE4 数据表
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ECAD Model:
更多信息:
SN74AS823ADWRE4 更多信息 SN74AS823ADWRE4 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
人字拖
RoHS:
Y
电路数量:
1
逻辑系列:
74AS
逻辑类型:
总线接口触发器
极性:
同相
输入类型:
单端
输出类型:
单端
传播延迟时间:
13 ns
高电平输出电流:
- 24 mA
低电平输出电流:
48 mA
电源电压 - 最小值:
4.5 V
电源电压 - 最大值:
5.5 V
最低工作温度:
0 C
最高工作温度:
+ 70 C
安装方式:
贴片/贴片
包装/案例:
SOIC-24
打包:
卷轴
功能:
D型总线接口
高度:
2.35 mm
长度:
15.4 mm
宽度:
7.52 mm
品牌:
德州仪器
通道数:
9
输入行数:
5
输出线数:
1
工作电源电压:
4.5 V to 5.5 V
产品类别:
人字拖
重置类型:
主复位
出厂包装数量:
1
子类别:
逻辑 IC
单位重量:
0.038731 oz
Tags
SN74AS823ADWR, SN74AS823AD, SN74AS823A, SN74AS823, SN74AS82, SN74AS8, SN74AS, SN74A, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC D-TYPE POS TRG SNGL 24SOIC
***ark
Flip-Flop Logic IC; Logic Family:AS; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:24-SOIC; No. of Pins:24; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes; Output Type:TTL ;RoHS Compliant: Yes
***as Instruments
These 9-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers, parity bus interfacing, and working registers. With the clock-enable () input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock (CLK) input. Taking high disables the clock buffer, latching the outputs. The SN54AS823A and SN74AS823A have noninverting data (D) inputs and the SN74AS824A has inverting (D\) inputs. Taking the clear () input low causes the nine Q outputs to go low independently of the clock. A buffered output-enable () input can be used to place the nine outputs in either a normal logic state (high or low logic level) or the high- impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54AS823A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74AS823A and SN74AS824A are characterized for operation from 0°C to 70°C.
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可用性
库存:
Available
订购:
3000
输入数量:
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