SN74ABT657ANSRE4

SN74ABT657ANSRE4
Mfr. #:
SN74ABT657ANSRE4
描述:
Bus Transceivers Octal Transceiver
生命周期:
制造商新产品。
数据表:
SN74ABT657ANSRE4 数据表
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ECAD Model:
更多信息:
SN74ABT657ANSRE4 更多信息 SN74ABT657ANSRE4 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
总线收发器
RoHS:
Y
逻辑系列:
74ABT
输入电平:
TTL
输出电平:
TTL
输出类型:
3-State
高电平输出电流:
- 32 mA
低电平输出电流:
64 mA
传播延迟时间:
4.2 ns
电源电压 - 最大值:
5.5 V
电源电压 - 最小值:
4.5 V
最低工作温度:
- 40 C
最高工作温度:
+ 85 C
包装/案例:
SO-24
打包:
卷轴
功能:
带有奇偶校验器的总线收发器
高度:
1.95 mm
长度:
15 mm
电路数量:
8
产品:
双CMOS
技术:
双CMOS
宽度:
5.3 mm
品牌:
德州仪器
安装方式:
贴片/贴片
通道数:
8
电源电流 - 最大值:
40 mA
工作电源电压:
4.5 V to 5.5 V
极性:
同相
产品类别:
总线收发器
出厂包装数量:
1
子类别:
逻辑 IC
单位重量:
0.010857 oz
Tags
SN74ABT657ANS, SN74ABT657AN, SN74ABT657, SN74ABT65, SN74ABT6, SN74AB, SN74A, SN74, SN7
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We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC TRANSCVR TRI-ST 16BIT 24SO
***as Instruments
The 'ABT657A transceivers have eight noninverting buffers with parity-generator/ checker circuits and control signals. The transmit/receive (T/R\) input determines the direction of data flow. When T/R\ is high, data flows from the A port to the B port (transmit mode); when T/R\ is low, data flows from the B port to the A port (receive mode). When the output-enable (OE\) input is high, both the A and B ports are in the high-impedance state. Odd or even parity is selected by a logic high or low level on the ODD/EVEN\ input. PARITY carries the parity-bit value; it is an output from the parity generator/checker in the transmit mode and an input to the parity generator/checker in the receive mode. In the transmit mode, after the A bus is polled to determine the number of high bits, PARITY is set to the logic level that maintains the parity sense selected by the level at ODD/EVEN\. For example, if ODD/EVEN\ is low (even parity selected) and there are five high bits on the A bus, PARITY is set to the logic high level so that an even number of the nine total bits (eight A-bus bits plus parity bit) are high. In the receive mode, after the B bus is polled to determine the number of high bits, the error (ERR\) output logic level indicates whether or not the data to be received exhibits the correct parity sense. For example, if ODD/EVEN\ is high (odd parity selected), PARITY is high, and there are three high bits on the B bus, ERR\ is low, indicating a parity error. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54ABT657A is characterized for operation over the full military temperature range of -55C to 125C. The SN74ABT657A is characterized for operation from -40C to 85C.
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可用性
库存:
Available
订购:
1500
输入数量:
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