CD40192BPWG4

CD40192BPWG4
Mfr. #:
CD40192BPWG4
描述:
Counter ICs CMOS Presettable BCD Up/Down Counter
生命周期:
制造商新产品。
数据表:
CD40192BPWG4 数据表
交货:
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ECAD Model:
更多信息:
CD40192BPWG4 更多信息 CD40192BPWG4 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
计数器 IC
RoHS:
Y
安装方式:
贴片/贴片
包装/案例:
TSSOP-16
计数器类型:
十年
逻辑系列:
CMOS
计数顺序:
上/下
工作电源电压:
3 V to 18 V
打包:
管子
品牌:
德州仪器
产品类别:
计数器 IC
出厂包装数量:
1
子类别:
计数器 IC
单位重量:
0.006102 oz
Tags
CD40192BP, CD40192, CD4019, CD401, CD40, CD4
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Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***ser
Logic - Counters CMOS Presettable BCD Up/Down Counter
*** Stop Electro
Decade Counter, 4000/14000/40000 Series, Synchronous, Positive Edge Triggered, 4-Bit, Bidirectional, CMOS, PDSO16
***i-Key
IC UP/DOWN COUNTR PRESET 16TSSOP
***as Instruments
CD40192b Presettable BCD Up/Down Counter and the CD40193B Presettable Binary Up/Down Counter each consist of 4 synchronously clocked, gated "D" type flip-flops connected as a counter. The inputs consist of 4 individual jam lines, a PRESET\ ENABLE\ control, individual CLOCK UP and CLOCK DOWN signals and a master RESET. Four buffered Q signal outputs as well as CARRY\ and BORROW\ outputs for multiple-stage counting schemes are provided. The counter is cleared so that all outputs are in a low state by a high on the RESET line. A RESET is accomplished asynchronously with the clock. Each output is individually programmable asynchronously with the clock to the level on the corresponding jam input when the PRESET\ ENABLE\ control is low. The counter counts up one count on the positive clock edge of the CLOCK UP signal provided the CLOCK DOWN line is high. The counter counts down on count on the positive clock edge of the CLOCK DOWN signal provided the CLOCK UP line is high. The CARRY\ and BORROW\ signals are high with the counter is counting up or down. The CARRY\ signal goes low one-half clock cycle after the counter reaches its maximum count in the count-up mode. The BORROW\ signal goes low one-half clock cycle after the counter reaches its minimum count in the count-down mode. Cascading of multiple packages is easily accomplished with out the need for additional external circuitry by tying the BORROW\ and CARRY\ outputs to the CLOCK DOWN and CLOCK UP inputs, respectively, of the succeeding counter package. The CD40192B and CD40193B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
型号 描述 库存 价格
CD40192BPWG4
DISTI # CD40192BPWG4-ND
IC UP/DOWN COUNTR PRESET 16TSSOP
RoHS: Compliant
Min Qty: 1800
Container: Tube
Limited Supply - Call
    CD40192BPWG4
    DISTI # 595-CD40192BPWG4
    Counter ICs CMOS Presettable BCD Up/Down Counter
    RoHS: Compliant
    0
      图片 型号 描述
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      INSTOCK
      可用性
      库存:
      Available
      订购:
      1000
      输入数量:
      CD40192BPWG4的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
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