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CD74HCT40103E

CD74HCT40103E
Mfr. #:
CD74HCT40103E
描述:
Counter ICs Hi-Sp CMOS Logic 8-Stg Sync Down
生命周期:
制造商新产品。
数据表:
CD74HCT40103E 数据表
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更多信息:
CD74HCT40103E 更多信息 CD74HCT40103E Product Details
产品属性
属性值
制造商：
德州仪器
产品分类：
计数器 IC
RoHS：
Y
安装方式：
通孔
包装/案例：
PDIP-16
计数器类型：
二进制
逻辑系列：
HCT
位数：
8 bit
计数顺序：
向下
工作电源电压：
4.5 V to 5.5 V
最低工作温度：
- 55 C
最高工作温度：
+ 125 C
系列：
CD74HCT40103
打包：
管子
功能：
柜台
工作温度范围：
- 55 C to + 125 C
输出电流：
+/- 4 mA
品牌：
德州仪器
产品类别：
计数器 IC
出厂包装数量：
25
子类别：
计数器 IC
单位重量：
0.033570 oz
Tags
CD74HCT40103E, CD74HCT40103, CD74HCT4010, CD74HCT401, CD74HCT40, CD74HCT4, CD74HCT, CD74HC, CD74H, CD74, CD7
Service Guarantees

We guarantee 100% customer satisfaction.

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We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
    E***n
    E***n
    RU

    Rate for speed

    2019-03-20
    M***f
    M***f
    DE

    Everything as expected, good packaging, all in all I'm totally satisfied.

    2019-05-09
***o-Tech
Binary down counter,CD74HCT40103E DIP16
***AS INSTRUMEN
The ’HC40103 and CD74HCT40103 are manufactured with high speed silicon gate technology and consist of an 8-stage synchronous down counter with a single output which is active when the internal count is zero. The 40103 contains a single 8-bit binary counter. Each has control inputs for enabling or disabling the clock, for clearing the counter to its maximum count, and for presetting the counter either synchronously or asynchronously. All control inputs and the TC\ output are active-low logic.
***as Instruments Inc.
In normal operation, the counter is decremented by one count on each positive transition of the CLOCK (CP). Counting is inhibited when the TE\ input is high. The TC\ output goes low when the count reaches zero if the TE\ input is low, and remains low for one full clock period.
***AS INS
When the PE\ input is low, data at the P0-P7 inputs are clocked into the counter on the next positive clock transition regardless of the state of the TE\ input. When the PL\ input is low, data at the P0-P7 inputs are asynchronously forced into the counter regardless of the state of the PE\, TE\, or CLOCK inputs. Input P0-P7 represent a single 8-bit binary word for the 40103. When the MR input is low, the counter is asynchronously cleared to its maximum count of 25510, regardless of the state of any other input. The precedence relationship between control inputs is indicated in the truth table.
***OMO Electronic
If all control inputs except TE\ are high at the time of zero count, the counters will jump to the maximum count, giving a counting sequence of 10016 or 25610 clock pulses long.
***ASI
The 40103 may be cascaded using the TE\ input and the TC\ output, in either a synchronous or ripple mode. These circuits possess the low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL circuits and can drive up to 10 LSTTL loads.
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可用性
库存:
358
订购:
2341
输入数量:
CD74HCT40103E的当前价格仅供参考，如果您想获得最优惠的价格，请提交查询或直接发送电子邮件至我们的销售团队[email protected]
参考价格（美元）
数量
单价
小计金额
1
US$1.24
US$1.24
10
US$1.06
US$10.60
100
US$0.81
US$80.90
500
US$0.72
US$357.50
1000
US$0.56
US$564.00
2500
US$0.50
US$1 252.50
10000
US$0.48
US$4 820.00
25000
US$0.47
US$11 675.00
由于2021年半导体供不应求，低于2021年之前的正常价格，请发询价确认。
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