CD74HC192PWR

CD74HC192PWR
Mfr. #:
CD74HC192PWR
描述:
Counter ICs Prest Sync 4bit UpDn
生命周期:
制造商新产品。
数据表:
CD74HC192PWR 数据表
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更多信息:
CD74HC192PWR 更多信息 CD74HC192PWR Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
计数器 IC
RoHS:
Y
安装方式:
贴片/贴片
包装/案例:
TSSOP-16
计数器类型:
十年
逻辑系列:
慧聪
位数:
4 bit
计数方法:
同步
计数顺序:
上/下
工作电源电压:
2 V to 6 V
最低工作温度:
- 55 C
最高工作温度:
+ 125 C
系列:
CD74HC192
打包:
卷轴
功能:
柜台
输入电压:
0.5 V to 1.5 V
工作温度范围:
- 55 C to + 125 C
输出电流:
+/- 5.2 mA
输出电压:
2.0 V to 6.0 V
品牌:
德州仪器
Pd - 功耗:
40 pF
产品类别:
计数器 IC
出厂包装数量:
2000
子类别:
计数器 IC
单位重量:
0.002183 oz
Tags
CD74HC192PWR, CD74HC192P, CD74HC192, CD74HC19, CD74HC1, CD74HC, CD74H, CD74, CD7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
    M***v
    M***v
    RU

    Fast shipping

    2019-04-04
    G***g
    G***g
    UA

    OK.

    2019-06-23
***p One Stop Global
Counter Single 4-Bit Async Decade UP/Down 16-Pin TSSOP T/R
***as Instruments
High Speed CMOS Logic Presettable Synchronous BCD Decade Up/Down Counter with Asynchronous Reset 16-TSSOP -55 to 125
***ser
Counter ICs Prest Sync 4bit UpDn
***i-Key
IC PRESET SYNC 4-BIT HS 16-TSSOP
***ark
Counter Logic IC; Counter Type:BCD Up-Down; Clock Speed:24MHz; Supply Voltage Range:2V to 6V; Logic Case Style:TSSOP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; Leaded Process Compatible:Yes; Logic Family:HC ;RoHS Compliant: Yes
***AS INSTRUMENTS INC
The ’HC192, ’HC193 and ’HCT193 are asynchronously presettable BCD Decade and Binary Up/Down synchronous counters, respectively.
***AS INS
Presetting the counter to the number on the preset data inputs (P0-P3) is accomplished by a LOW asynchronous parallel load input (PL)\. The counter is incremented on the low-to-high transition of the Clock-Up input (and a high level on the Clock-Down input) and decremented on the low to high transition of the Clock-Down input (and a high level on the Clock-up input). A high level on the MR input overrides any other input to clear the counter to its zero state. The Terminal Count up (carry) goes low half a clock period before the zero count is reached and returns to a high level at the zero count. The Terminal Count Down (borrow) in the count down mode likewise goes low half a clock period before the maximum count (9 in the 192 and 15 in the 193) and returns to high at the maximum count. Cascading is effected by connecting the carry and borrow outputs of a less significant counter to the Clock-Up and CLock-Down inputs, respectively, of the next most significant counter.
***INS
If a decade counter is present to an illegal state or assumes an illegal state when power is applied, it will return to the normal sequence in one count as shown in state diagram.
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可用性
库存:
Available
订购:
1985
输入数量:
CD74HC192PWR的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
参考价格(美元)
数量
单价
小计金额
1
US$0.59
US$0.59
10
US$0.49
US$4.90
100
US$0.32
US$31.60
1000
US$0.25
US$253.00
由于2021年半导体供不应求,低于2021年之前的正常价格,请发询价确认。
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