SN74ABT3614-20PCB

SN74ABT3614-20PCB
Mfr. #:
SN74ABT3614-20PCB
描述:
FIFO 64 x 36 x 2 bidir Synch FIFO Memory
生命周期:
制造商新产品。
数据表:
SN74ABT3614-20PCB 数据表
交货:
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ECAD Model:
更多信息:
SN74ABT3614-20PCB 更多信息 SN74ABT3614-20PCB Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
先进先出
RoHS:
Y
数据总线宽度:
36 bit
巴士方向:
双向
内存大小:
4.5 kbit
计时类型:
同步
组织:
64 k x 36 x 2
电路数量:
2
最大时钟频率:
50 MHz
访问时间:
12 ns
电源电压 - 最大值:
5.5 V
电源电压 - 最小值:
4.5 V
电源电流 - 最大值:
130 mA
最低工作温度:
0 C
最高工作温度:
+ 70 C
包装/案例:
HLQFP-120
打包:
托盘
高度:
1.4 mm
系列:
SN74ABT3614
宽度:
14 mm
品牌:
德州仪器
安装方式:
贴片/贴片
湿气敏感:
是的
工作电源电压:
5 V
产品类别:
先进先出
出厂包装数量:
90
子类别:
内存和数据存储
Tags
SN74ABT3614, SN74ABT36, SN74ABT3, SN74AB, SN74A, SN74, SN7
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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***as Instruments
64 x 36 x 2 bidirectional synchronous FIFO memory 120-HLQFP 0 to 70
*** Stop Electro
Bi-Directional FIFO, 64X36, 12ns, Synchronous, BICMOS, PQFP120
***et
FIFO Mem Sync Dual Bi-Dir 64 x 36 x 2 120-Pin HLQFP Tray
*** Stop Electro
Bi-Directional FIFO, 256X36, 13ns, Synchronous, CMOS, PQFP120
***et
FIFO Mem Sync Dual Bi-Dir 256 x 36 x 2 120-Pin HLQFP EP Tray
***as Instruments
The SN74ACT3622 is a high-speed, low-power CMOS clocked bidirectional FIFO memory. It supports clock frequencies up to 67 MHz with read access times of 11 ns. Two independent 256 36 dual-port SRAM FIFOs on the chip buffer data in opposite directions. Each FIFO has flags to indicate empty and full conditions and two programmable flags almost full (AF\) and almost empty (AE\) to indicate when a selected number of words is stored in memory. Communication between each port can bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has been stored. Two or more devices can be used in parallel to create wider datapaths. The SN74ACT3622 is a clocked FIFO, which means each port employs a synchronous interface. All data transfers through a port are gated to the low-to-high transition of a port clock by enable signals. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control. The input-ready (IRA, IRB) flag and almost-full (AFA\, AFB\) flag of a FIFO are two-stage synchronized to the port clock that writes data to its array. The output-ready (ORA, ORB) flag and almost-empty (AEA\, AEB\) flag of a FIFO are two-stage synchronized to the port clock that reads data from its array. Offset values for the AF\ and AE\ flags of the FIFO can be programmed from port A. The SN74ACT3622 is characterized for operation from 0C to 70C. For more information on this device family, see the application report FIFO Mailbox-Bypass Registers: Using Bypass Registers to Initialize DMA Control (literature number SCAA007) and Metastability Performance of Clocked FIFOs (literature number SCZA004).
***as Instruments
512 x 36 synchronous FIFO memory 120-HLQFP 0 to 70
***et
FIFO Mem Sync Dual Depth/Width Bi-Dir 512 x 36 120-Pin HLQFP Tray
*** Stop Electro
FIFO, 512X36, 13ns, Synchronous, CMOS, PQFP120
***i-Key
IC CLOCKED FIFO MEMORY 120HLQFP
***as Instruments
1024 x 36 synchronous FIFO Memory 120-HLQFP 0 to 70
***et
FIFO Mem Sync Dual Depth/Width Bi-Dir 1K x 36 120-Pin HLQFP Tray
*** Stop Electro
Bi-Directional FIFO, 1KX36, 13ns, Synchronous, CMOS, PQFP120
型号 描述 库存 价格
SN74ABT3614-20PCB
DISTI # 296-3998-ND
IC SNC FIFO MEM 64X36X2 120HLQFP
RoHS: Compliant
Min Qty: 90
Container: Tray
Limited Supply - Call
    SN74ABT3614-20PCBBi-Directional FIFO, 64X36, 12ns, Synchronous, BICMOS, PQFP120
    RoHS: Compliant
    1894
    • 1000:$24.9100
    • 500:$26.2200
    • 100:$27.3000
    • 25:$28.4700
    • 1:$30.6600
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    可用性
    库存:
    Available
    订购:
    5500
    输入数量:
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