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CD4029BPWR

CD4029BPWR
Mfr. #:
CD4029BPWR
描述:
Counter ICs CMOS Prsttable Up/ DwnCounter
生命周期:
制造商新产品。
数据表:
CD4029BPWR 数据表
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ECAD Model:
更多信息:
CD4029BPWR 更多信息 CD4029BPWR Product Details
产品属性
属性值
制造商：
德州仪器
产品分类：
计数器 IC
RoHS：
Y
安装方式：
贴片/贴片
包装/案例：
TSSOP-16
计数器类型：
二进制，十年
逻辑系列：
CD4000
位数：
4 bit
计数顺序：
上/下
工作电源电压：
3 V to 18 V
最低工作温度：
- 55 C
最高工作温度：
+ 125 C
系列：
CD4029B
打包：
卷轴
功能：
柜台
工作温度范围：
- 55 C to + 125 C
输出电流：
+/- 1.5 mA
品牌：
德州仪器
产品类别：
计数器 IC
出厂包装数量：
2000
子类别：
计数器 IC
单位重量：
0.002183 oz
Tags
CD4029BPWR, CD4029BP, CD4029B, CD4029, CD402, CD40, CD4
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***as Instruments
CMOS Presettable Up/Down Counter 16-TSSOP -55 to 125
***et
Counter Single 4-Bit Async Binary/Decade UP/Down 16-Pin TSSOP T/R
***ark
Counter Logic IC; Logic Family:CD4000; Supply Voltage Min:3V; Supply Voltage Max:18V; Package/Case:16-TSSOP; No. of Pins:16; Operating Temperature Range:-55°C to +125°C; Input Type:CMOS; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
***AS
CD4029B consists of a four-stage binary or BCD-decade up/down counter with provisions for look-ahead carry in both counting modes. The inputs consist of a single CLOCK, CARRY-IN\ (CLOCK ENABLE\), BINARY/DECADE, UP/DOWN, PRESET ENABLE, and four individual JAN signals, Q1, Q2, Q3, Q4 and a CARRY OUT\ signal are provided as outputs.
***as Instr.
A high PRESET ENABLE signal allows information on the JAM INPUTS to preset the counter to any state asynchronously with the clock. A low on each JAM line, when the PRESET-ENABLE signal is high, resets the counter to its zero count. The counter is advanced one count at the positive transition of the clock when the CARRY-IN\ and PRESET ENALBE signals are low. Advancement is inhibited when the CARRY-IN\ or PRESET ENABLE signals are high. The CARRY-OUT\ signal is normally high and goes low when the counter reaches its maximum count in the UP mode or the minimum count in the DOWN mode provided the CARRY-IN\ signal is low. The CARRY-IN\ signal in the low state can thus be considered a CLOCK ENABLE\. The CARRY-IN\ terminal must be connected to VSS when not in use.
***AS INSTUMENTS
Binary counting is accomplished when the BINARY/DECADE input is high; the counter counts in the decade mode when the BINARY/DECADE input is low. The counter counts up when the UP/DOWN input is high, and down when the UP/DOWN input is low. Multiple packages can be connected in either a parallel-clocking or a ripple-clocking arrangement as shown in Fig. 17.
***AS
Parallel clocking provides synchronous control and hence faster response from all counting outputs. Ripple-clocking allows for longer clock input rise and fall times.
***AS INSTRU
The CD4029B-series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
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可用性
库存:
Available
订购:
1985
输入数量:
CD4029BPWR的当前价格仅供参考，如果您想获得最优惠的价格，请提交查询或直接发送电子邮件至我们的销售团队[email protected]
参考价格（美元）
数量
单价
小计金额
1
US$0.48
US$0.48
10
US$0.39
US$3.90
100
US$0.24
US$24.00
1000
US$0.19
US$186.00
由于2021年半导体供不应求，低于2021年之前的正常价格，请发询价确认。
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