74ALVCH16600DLG4

74ALVCH16600DLG4
Mfr. #:
74ALVCH16600DLG4
描述:
Bus Transceivers 18-Bit Univ Bus Trncvr W/3-St Otpt
生命周期:
制造商新产品。
数据表:
74ALVCH16600DLG4 数据表
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ECAD Model:
更多信息:
74ALVCH16600DLG4 更多信息 74ALVCH16600DLG4 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
总线收发器
RoHS:
Y
逻辑系列:
74AL
输入电平:
LVTTL
输出电平:
LVTTL
输出类型:
3-State
高电平输出电流:
- 24 mA
低电平输出电流:
24 mA
传播延迟时间:
6.8 ns
电源电压 - 最大值:
3.6 V
电源电压 - 最小值:
1.65 V
最低工作温度:
- 40 C
最高工作温度:
+ 85 C
包装/案例:
SSOP-56
打包:
管子
功能:
通用总线收发器
高度:
2.59 mm
长度:
18.41 mm
电路数量:
1
产品:
CMOS
技术:
CMOS
宽度:
7.49 mm
品牌:
德州仪器
安装方式:
贴片/贴片
通道数:
18
电源电流 - 最大值:
40 uA
工作电源电压:
1.65 V to 3.6 V
极性:
同相
产品类别:
总线收发器
出厂包装数量:
1
子类别:
逻辑 IC
触发类型:
负边缘
单位重量:
0.024508 oz
Tags
74ALVCH16600D, 74ALVCH16600, 74ALVCH1660, 74ALVCH166, 74ALVCH1, 74ALVCH, 74ALVC, 74ALV, 74AL, 74A
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

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Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
*** Stop Electro
Registered Bus Transceiver, ALVC/VCX/A Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56
***i-Key
IC UNIV BUS TXRX 18BIT 56SSOP
***eco
18-BIT UBT W/CLK ENABLE
***el Nordic
Contact for details
***as Instruments
This 18-bit universal bus transceiver is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH16600 combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB\ and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB\ and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB\ and CLKENBA\) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB\ is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the high-to-low transition of CLKAB\. Output enable OEAB\ is active low. When OEAB\ is low, the outputs are active. When OEAB\ is high, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses OEBA\, LEBA, CLKBA\, and CLKENBA\. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
型号 描述 库存 价格
74ALVCH16600DLG4
DISTI # 74ALVCH16600DLG4-ND
IC UNIV BUS TXRX 18BIT 56SSOP
RoHS: Compliant
Min Qty: 120
Container: Tube
Limited Supply - Call
    74ALVCH16600DLG4
    DISTI # 595-74ALVCH16600DLG4
    Bus Transceivers 18-Bit Univ Bus Trncvr W/3-St Otpt
    RoHS: Compliant
    0
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      可用性
      库存:
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      订购:
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      输入数量:
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