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CDC5801ADBQ

CDC5801ADBQ
Mfr. #:
CDC5801ADBQ
描述:
Phase Locked Loops - PLL Lo Jitter Clock Mult & Divider
生命周期:
制造商新产品。
数据表:
CDC5801ADBQ 数据表
交货:
DHL FedEx Ups TNT EMS
支付:
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ECAD Model:
更多信息:
CDC5801ADBQ 更多信息 CDC5801ADBQ Product Details
产品属性
属性值
制造商：
德州仪器
产品分类：
锁相环 - PLL
RoHS：
Y
类型：
零延迟 PLL 时钟乘法器
电路数量：
1
最大输入频率：
125 MHz
最小输入频率：
19 MHz
输出频率范围：
150 MHz to 62.5 MHz
电源电压 - 最大值：
3.6 V
电源电压 - 最小值：
3 V
最低工作温度：
- 40 C
最高工作温度：
+ 85 C
安装方式：
贴片/贴片
包装/案例：
QSOP-24
打包：
管子
特征：
扩频时钟 (SSC)
高度：
1.5 mm
长度：
8.75 mm
系列：
CDC5801A
宽度：
4 mm
品牌：
德州仪器
输入电平：
低电压CMOS
输出电平：
LVDS、LVPECL、LVTTL
湿气敏感：
是的
工作电源电压：
3.3 V
产品类别：
PLL - 锁相环
出厂包装数量：
50
子类别：
无线和射频集成电路
单位重量：
0.059966 oz
Tags
CDC5801ADBQ, CDC5801A, CDC5801, CDC580, CDC58, CDC5, CDC
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***ical
Clock Generator 19MHz to 125MHz-IN 500MHz-OUT 24-Pin SSOP Tube
***as Instruments
Low-jitter clock multiplier & divider with programmable delay & phase alignment 24-SSOP -40 to 85
***p One Stop Global
Zero Delay PLL Clock Multiplier Single 24-Pin SSOP Tube
***ark
CLOCK MULTIPLIER/DIVIDER 500MHZ SSOP24
***eco
LOW JITTER CLOCK MULTIPLIER / DIVIDER<AZ
***i-Key
IC CLOCK MLT/DIV LOW JTTR 24QSOP
***
The CDC5801A device provides clock multiplication and division from a single-ended reference clock (REFCLK) to a differential output pair (CLKOUT/CLKOUTB). The multiply and divide terminals (MULT/DIV0:1) provide selection for frequency multiplication and division ratios, generating CLKOUT/CLOUTKB frequencies ranging from 12.5 MHz to 500 MHz with a clock input reference (REFCLK) ranging from 19 MHz to 125 MHz.
***XS
The implemented phase aligner provides the possibility to phase align (zero delay) between CLKOUT/CLKOUTB and REFCLK or any other CLK in the system by feeding the clocks that need to be aligned to the DLYCTRL and the LEADLAG terminals.
***AS INSTRU
The phase aligner also allows the user to delay or advance the CLKOUT/CLKOUTB with steps of 2.6 mUI (unit interval). For every rising edge on the DLYCTRL terminal, the output clocks are delayed by 2.6-mUI step size as long as there is low on the LEADLAG terminal. Similarly, for every rising edge on the DLYCTRL terminal, the output clocks are advanced by 2.6-mUI step size as long as there is high on the LEADLAG terminal. The CDC5801A has a fail-safe power up initialization state-machine which supports proper operation under all power up conditions. As the phase between REFCLK and CLKOUT/CLKOUTB is random after power up, the application may implement a self calibration routine at power up to produce a certain phase start position, before programming a fixed delay with the clock on the DLYCTRL terminal.
***AS INSTRUM
Depending on the selection of the mode terminals (P0:2), the device behaves as a multiplier (by 4, 6, or 8) with the phase aligner bypassed or as a multiplier or divider with programmable delay and phase aligner functionality. Through the select terminals (P0:2) user can also bypass the phase aligner and the PLL (test mode) and output the REFCLK directly on the CLKOUT/CLKOUTB terminals. Through P0:2 terminals the outputs could be in a high impedance state. This device has another unique capability to be able to function with a wide band of voltages on the REFCLK terminal by varying the voltage on the VDDREF terminal.
***AS INSRUMENTS
The CDC5801A has a fail-safe power up initialization state-machine which supports proper operation under all power up conditions.
***AS INSTUMENTS
The CDC5801A device is characterized for operation over free-air temperatures of –40°C to 85°C.
型号 描述 库存 价格
CDC5801ADBQ
DISTI # 296-21221-5-ND		IC CLOCK MLT/DIV LOW JTTR 24QSOP
RoHS: Compliant
Min Qty: 1
Container: Tube		201In Stock
  • 1000:$5.7146
  • 500:$6.5612
  • 100:$7.5347
  • 50:$8.6776
  • 10:$9.1010
  • 1:$10.0700
CDC5801ADBQR
DISTI # 296-19401-2-ND		IC CLOCK MLT/DIV LOW JTTR 24QSOP
RoHS: Compliant
Min Qty: 2500
Container: Tape & Reel (TR)		Temporarily Out of Stock
  • 2500:$4.6566
CDC5801ADBQRG4
DISTI # CDC5801ADBQRG4-ND		IC CLOCK MLT/DIV LOW JTTR 24QSOP
RoHS: Compliant
Min Qty: 2500
Container: Tape & Reel (TR)		Temporarily Out of Stock
  • 2500:$4.6566
CDC5801ADBQG4
DISTI # CDC5801ADBQG4-ND		IC CLOCK MLT/DIV LOW JTTR 24QSOP
RoHS: Compliant
Min Qty: 100
Container: Tube		Temporarily Out of Stock
  • 100:$7.5347
CDC5801ADBQ
DISTI # CDC5801ADBQ		Zero Delay PLL Clock Multiplier Single 24-Pin SSOP Tube - Rail/Tube (Alt: CDC5801ADBQ)
RoHS: Compliant
Min Qty: 100
Container: Tube		Americas - 0
  • 100:$6.0900
  • 200:$5.7900
  • 300:$5.5900
  • 500:$5.3900
  • 1000:$5.2900
CDC5801ADBQR
DISTI # CDC5801ADBQR		Zero Delay PLL Clock Multiplier Single 24-Pin SSOP T/R - Tape and Reel (Alt: CDC5801ADBQR)
RoHS: Compliant
Min Qty: 2500
Container: Reel		Americas - 0
  • 2500:$5.0900
  • 5000:$4.8900
  • 10000:$4.6900
  • 15000:$4.5900
  • 25000:$4.3900
CDC5801ADBQLow Jitter Clock Multiplier & Divider w/Programmable Delay & Phase Alignment4000
  • 1000:$4.8100
  • 750:$4.9100
  • 500:$5.6700
  • 250:$6.5200
  • 100:$6.9800
  • 25:$7.7900
  • 10:$8.3400
  • 1:$9.2700
CDC5801ADBQ
DISTI # 595-CDC5801ADBQ		Phase Locked Loops - PLL Lo Jitter Clock Mult & Divider
RoHS: Compliant		103
  • 1:$10.0700
  • 10:$9.1100
  • 50:$8.4300
  • 100:$7.5400
  • 250:$7.1600
  • 500:$6.5700
  • 1000:$5.7200
CDC5801ADBQR
DISTI # 595-CDC5801ADBQR		Phase Locked Loops - PLL Lo Jitter Clock Mult & Divider
RoHS: Compliant		0
  • 2500:$4.6600
CDC5801ADBQRG4
DISTI # 595-CDC5801ADBQRG4		Phase Locked Loops - PLL Lo Jitter Clock Mult & Divider
RoHS: Compliant		0
    CDC5801ADBQG4
    DISTI # 595-CDC5801ADBQG4    		Phase Locked Loops - PLL Lo Jitter Clock Mult & Divider
    RoHS: Compliant    		0
      CDC5801ADBQPLL Based Clock Driver, CDC Series, 1 True Output(s), 1 Inverted Output(s), PDSO24
      RoHS: Compliant      		334
      • 1000:$5.5700
      • 500:$5.8600
      • 100:$6.1000
      • 25:$6.3600
      • 1:$6.8500
      CDC5801ADBQRPLL Based Clock Driver, CDC Series, 1 True Output(s), 1 Inverted Output(s), PDSO24
      RoHS: Compliant      		14950
      • 1000:$4.7100
      • 500:$4.9600
      • 100:$5.1600
      • 25:$5.3800
      • 1:$5.8000
      CDC5801ADBQ 68
      • 34:$7.0115
      • 10:$7.5800
      • 1:$11.3700
      CDC5801ADBQR 7582
        图片 型号 描述
        CDC5801ADBQ

        Mfr.#: CDC5801ADBQ

        OMO.#: OMO-CDC5801ADBQ

        		 Phase Locked Loops - PLL Lo Jitter Clock Mult & Divider
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        Mfr.#: CDC5801DBQR

        OMO.#: OMO-CDC5801DBQR

        		 Phase Locked Loops - PLL Lo Jitter PLL Based Mult/Divider
        CDC5801ADBQR

        Mfr.#: CDC5801ADBQR

        OMO.#: OMO-CDC5801ADBQR

        		 Phase Locked Loops - PLL Lo Jitter Clock Mult & Divider
        CDC5801DBQ

        Mfr.#: CDC5801DBQ

        OMO.#: OMO-CDC5801DBQ

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        可用性
        库存:
        103
        订购:
        2086
        输入数量:
        CDC5801ADBQ的当前价格仅供参考，如果您想获得最优惠的价格，请提交查询或直接发送电子邮件至我们的销售团队[email protected]
        参考价格（美元）
        数量
        单价
        小计金额
        1
        US$10.07
        US$10.07
        10
        US$9.11
        US$91.10
        50
        US$8.43
        US$421.50
        100
        US$7.54
        US$754.00
        250
        US$7.16
        US$1 790.00
        500
        US$6.57
        US$3 285.00
        1000
        US$5.72
        US$5 720.00
        由于2021年半导体供不应求，低于2021年之前的正常价格，请发询价确认。
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