CDCLVD2108RGZR

CDCLVD2108RGZR
Mfr. #:
CDCLVD2108RGZR
描述:
Clock Buffer Low Jitter,Dual 1:8 Uni-to-LVDS Bfr
生命周期:
制造商新产品。
数据表:
CDCLVD2108RGZR 数据表
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ECAD Model:
更多信息:
CDCLVD2108RGZR 更多信息 CDCLVD2108RGZR Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
时钟缓冲器
RoHS:
Y
系列:
CDCLVD2108
输出数量:
16 Output
最大输入频率:
800 MHz
最低工作温度:
- 40 C
最高工作温度:
+ 85 C
安装方式:
贴片/贴片
包装/案例:
VQFN-48
打包:
卷轴
输入类型:
LVCMOS、LVDS、LVPECL
输出类型:
LVDS
品牌:
德州仪器
最大输出频率:
800 MHz
湿气敏感:
是的
产品类别:
时钟缓冲器
出厂包装数量:
2500
子类别:
时钟和定时器 IC
单位重量:
0.004938 oz
Tags
CDCLVD2, CDCLVD, CDCLV, CDCL, CDC
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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we buy and manage excess electronic components, including excess inventory identified for disposal.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***ical
Clock Fanout Buffer 32-OUT 2-IN Dual 1:8 48-Pin VQFN EP T/R
*** Stop Electro
Low Skew Clock Driver, CDC Series, 8 True Output(s), 0 Inverted Output(s), PQCC48
***as Instruments
Low jitter, dual 1:8 universal-to-LVDS buffer 48-VQFN -40 to 85
***AS INST
The CDCLVD2108 clock buffer distributes two clock inputs (IN0, IN1) to a total of 16 pairs of differential LVDS clock outputs (OUT0, OUT15). Each buffer block consists of one input and 8 LVDS outputs. The inputs can either be LVDS, LVPECL, or LVCMOS.
***
The CDCLVD2108 is specifically designed for driving 50- transmission lines. In case of driving the inputs in single ended mode, the appropriate bias voltage (VAC_REF) should be applied to the unused negative input pin.
***OMO Electronic
Using the control pin (EN) outputs can be either disabled or enabled. If the EN pin is left open all outputs are active, if switched to a logical "0" all outputs are disabled (static logical 0), if switched to a logical "1", OUT (8..15) are switched off and OUT (0..7) are active. The part supports a fail safe function. It incorporates an input hysteresis, which prevents random oscillation of the outputs in absence of an input signal.
***AS INSTRUM
The device operates in 2.5V supply environment and is characterized from –40°C to 85°C (ambient temperature). The CDCLVD2108 is packaged in small 48-pin, 7-mm × 7-mm QFN package.
型号 描述 库存 价格
CDCLVD2108RGZR
DISTI # V36:1790_07248363
Clock Fanout Buffer 32-OUT 2-IN Dual 1:8 48-Pin VQFN EP T/R0
  • 2500000:$6.3990
  • 1250000:$6.4010
  • 250000:$6.5260
  • 25000:$6.7260
  • 2500:$6.7580
CDCLVD2108RGZR
DISTI # V39:1801_07248363
Clock Fanout Buffer 32-OUT 2-IN Dual 1:8 48-Pin VQFN EP T/R0
  • 2500000:$6.3990
  • 1250000:$6.4010
  • 250000:$6.5260
  • 25000:$6.7260
  • 2500:$6.7580
CDCLVD2108RGZR
DISTI # CDCLVD2108RGZR-ND
IC CLK BUFFER 1:8 800MHZ 48VQFN
Min Qty: 2500
Container: Tape & Reel (TR)
Temporarily Out of Stock
  • 2500:$6.7584
CDCLVD2108RGZR
DISTI # CDCLVD2108RGZR
Clock Fanout Buffer 32-OUT 48-Pin VQFN EP T/R - Tape and Reel (Alt: CDCLVD2108RGZR)
RoHS: Compliant
Min Qty: 2500
Container: Reel
Americas - 0
    CDCLVD2108RGZT
    DISTI # 595-CDCLVD2108RGZT
    Clock Buffer Low Jitter,Dual 1:8 Uni-to-LVDS Bfr
    RoHS: Compliant
    166
    • 1:$12.7500
    • 10:$11.7200
    • 25:$11.1200
    • 100:$9.9000
    • 250:$9.4200
    • 500:$8.8100
    CDCLVD2108RGZR
    DISTI # 595-CDCLVD2108RGZR
    Clock Buffer Low Jitter,Dual 1:8 Uni-to-LVDS Bfr
    RoHS: Compliant
    0
    • 2500:$7.0300
    图片 型号 描述
    CDCLVD1212EVM

    Mfr.#: CDCLVD1212EVM

    OMO.#: OMO-CDCLVD1212EVM

    Clock & Timer Development Tools CDCLVD1212EVM
    CDCLVD1212EVM

    Mfr.#: CDCLVD1212EVM

    OMO.#: OMO-CDCLVD1212EVM-TEXAS-INSTRUMENTS

    CDCLVD1212 Evaluation Module
    可用性
    库存:
    Available
    订购:
    5500
    输入数量:
    CDCLVD2108RGZR的当前价格仅供参考,如果您想获得最优惠的价格,请提交查询或直接发送电子邮件至我们的销售团队[email protected]
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