SN74ALS580BDWE4

SN74ALS580BDWE4
Mfr. #:
SN74ALS580BDWE4
描述:
Latches Octal DType Transparent Latches
生命周期:
制造商新产品。
数据表:
SN74ALS580BDWE4 数据表
交货:
DHL FedEx Ups TNT EMS
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ECAD Model:
更多信息:
SN74ALS580BDWE4 更多信息 SN74ALS580BDWE4 Product Details
产品属性
属性值
制造商:
德州仪器
产品分类:
锁存器
RoHS:
Y
电路数量:
8 Circuit
逻辑类型:
D型透明锁扣
逻辑系列:
肌萎缩侧索硬化
极性:
反转
输出线数:
8 Line
高电平输出电流:
- 2.6 mA
低电平输出电流:
32 mA
传播延迟时间:
18 ns
电源电压 - 最大值:
5.5 V
电源电压 - 最小值:
4.5 V
最低工作温度:
0 C
最高工作温度:
+ 70 C
包装/案例:
SOIC-20
打包:
管子
功能:
透明的
高度:
2.35 mm
长度:
12.8 mm
输出类型:
3-State
类型:
D型
宽度:
7.52 mm
品牌:
德州仪器
安装方式:
贴片/贴片
通道数:
8 Channels
输入行数:
8 Line
工作电源电流:
26 mA
工作电源电压:
5 V
产品类别:
锁存器
重置类型:
无重置
出厂包装数量:
1
子类别:
逻辑 IC
单位重量:
0.019048 oz
Tags
SN74ALS580BD, SN74ALS580B, SN74ALS58, SN74ALS5, SN74ALS, SN74AL, SN74A, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC LATCH TRANSP OCTAL D 20-SOIC
***ark
ICs, Latches Logic; Logic Family:ALS; Supply Voltage Min:4.5V; Supply Voltage Max:5.5V; Package/Case:20-SOIC; No. of Pins:20; Operating Temperature Range:0°C to +70°C; Input Type:TTL; Leaded Process Compatible:Yes; Output Type:TTL ;RoHS Compliant: Yes
***as Instruments
These octal D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. While the latch-enable (LE) input is high, outputs (Q\) respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up. A buffered output-enable input can be used to place the eight outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without interface or pullup components. does not affect internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54ALS580B is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS580B and SN74AS580 are characterized for operation from 0°C to 70°C.
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Flip Flops Dual Pos-Edge-Trig J-K Flip-Flop
可用性
库存:
Available
订购:
4000
输入数量:
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